From: "Jan Beulich" <JBeulich@suse.com>
To: Chao Gao <chao.gao@intel.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Kevin Tian <kevin.tian@intel.com>,
Jun Nakajima <jun.nakajima@intel.com>,
xen-devel@lists.xen.org
Subject: Re: [PATCH v5 1/4] VT-d PI: track the number of vcpus on pi blocking list
Date: Fri, 01 Sep 2017 04:04:37 -0600 [thread overview]
Message-ID: <59A94CD5020000780017673D@prv-mh.provo.novell.com> (raw)
In-Reply-To: <59A94A9A0200007800176726@prv-mh.provo.novell.com>
>>> On 01.09.17 at 11:55, <JBeulich@suse.com> wrote:
>>>> On 01.09.17 at 10:37, <chao.gao@intel.com> wrote:
>> it seems add_sized() won't be a LOCKed instruction.
>> #define build_add_sized(name, size, type, reg) \
>> static inline void name(volatile type *addr, type val) \
>> { \
>> asm volatile("add" size " %1,%0" \
>> : "=m" (*addr) \
>> : reg (val)); \
>> }
>
> Oh, you're right. But then I'd still like you to not add a new
> user, as I don't see why it was introduced in the first place:
> Independent of architecture it is equivalent to
>
> write_atomic(p, read_atomic(p) + c)
>
> and hence I'd like to get rid of it as misleading/redundant.
Actually, on x86 it still is a bit better than the generic replacement,
i.e. it would only be worthwhile dropping the custom ARM variant
in favor of a generic one. Keep using it here then.
Jan
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next prev parent reply other threads:[~2017-09-01 10:04 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-16 5:14 [PATCH v5 0/4] mitigate the per-pCPU blocking list may be too long Chao Gao
2017-08-16 5:14 ` [PATCH v5 1/4] VT-d PI: track the number of vcpus on pi blocking list Chao Gao
2017-08-30 16:00 ` Jan Beulich
2017-08-30 22:57 ` Chao Gao
2017-08-31 7:42 ` Jan Beulich
2017-08-31 7:15 ` Chao Gao
2017-08-31 8:33 ` Jan Beulich
2017-08-31 7:53 ` Chao Gao
2017-09-01 1:39 ` Chao Gao
2017-09-01 8:24 ` Jan Beulich
2017-09-01 7:55 ` Chao Gao
2017-09-01 9:13 ` Jan Beulich
2017-09-01 8:37 ` Chao Gao
2017-09-01 9:55 ` Jan Beulich
2017-09-01 10:04 ` Jan Beulich [this message]
2017-08-16 5:14 ` [PATCH v5 2/4] x86/vcpu: track hvm vcpu number on the system Chao Gao
2017-08-16 5:14 ` [PATCH v5 3/4] VT-d PI: restrict the number of vcpus in a given pcpu's PI blocking list Chao Gao
2017-08-31 16:01 ` Jan Beulich
2017-08-16 5:14 ` [PATCH v5 4/4] xentrace: add support for HVM's PI blocking list operation Chao Gao
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