From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756156AbdJLLPB (ORCPT ); Thu, 12 Oct 2017 07:15:01 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:8012 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752824AbdJLLPA (ORCPT ); Thu, 12 Oct 2017 07:15:00 -0400 Subject: Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support To: Lorenzo Pieralisi References: <1501876754-1064-1-git-send-email-nleeder@codeaurora.org> <394bd3b8-2583-01fa-02d3-6a49c2a6a6c0@linaro.org> <3eac1295-dba2-ad79-d868-b538b13de91a@codeaurora.org> <67a696ad-98e9-d505-1d73-7246d2efc398@codeaurora.org> <59DF4AD9.2060903@huawei.com> <20171012110538.GA8509@red-moon> CC: "Leeder, Neil" , Hanjun Guo , Will Deacon , Mark Rutland , , , Mark Langsdorf , Mark Salter , Jon Masters , Timur Tabi , Mark Brown , Robin Murphy From: Hanjun Guo Message-ID: <59DF4DFF.9070609@huawei.com> Date: Thu, 12 Oct 2017 19:11:59 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20171012110538.GA8509@red-moon> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.17.188] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090206.59DF4EAA.010F,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: ccce072dbd4cc682e68a7d14aec849f0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2017/10/12 19:05, Lorenzo Pieralisi wrote: > On Thu, Oct 12, 2017 at 06:58:33PM +0800, Hanjun Guo wrote: >> On 2017/8/11 11:28, Leeder, Neil wrote: >>> On 8/9/2017 9:26 PM, Hanjun Guo wrote: >>>>> On 2017/8/9 23:48, Leeder, Neil wrote: >>>>>>>>>>> drivers/perf/Kconfig | 9 + >>>>>>>>>>> drivers/perf/Makefile | 1 + >>>>>>>>>>> drivers/perf/arm_smmuv3_pmu.c | 823 ++++++++++++++++++++++++++++++++++++++++++ >>>>>>>>>>> include/acpi/actbl2.h | 9 +- >>>>>>>>> Do you have the acpica support code? I'm currently >>>>>>>>> working on SMMUv3 MSI support and I would like to test >>>>>>>>> it with MSI support for PMCG as well. >>>>>>> I don't have any code other than what was posted here. >>>>>>> What additional ACPICA support code is needed? >>>>> Sorry for not clear, I mean the acpica code for iASL and >>>>> other tool: github.com/acpica/acpica.git >>>>> >>>>> With that code, I can compile my IORT table with PMCG node. >>> Unfortunately it looks like I'm the first person from Qualcomm Datacenter >>> Technologies to try to add something to ACPICA, which means I'll have to >>> kick off an internal legal process which may take some time. Unless someone >>> else wants to take a crack at it - and really, there's nothing more than is >>> in the ARM IORT spec - it could be a while before I can do that. >> Just a update, I sent a pull request to Bob for ACPICA changes, >> please take a look: >> >> https://github.com/acpica/acpica/pull/327 > You should not have done that. We need to update IORT specifications > for IORT PMCG before merging ACPICA PMCG support. > > Ask Robert to drop it straight away or I will. Sorry, I will do that, thanks for the reminder. Thanks Hanjun From mboxrd@z Thu Jan 1 00:00:00 1970 From: guohanjun@huawei.com (Hanjun Guo) Date: Thu, 12 Oct 2017 19:11:59 +0800 Subject: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support In-Reply-To: <20171012110538.GA8509@red-moon> References: <1501876754-1064-1-git-send-email-nleeder@codeaurora.org> <394bd3b8-2583-01fa-02d3-6a49c2a6a6c0@linaro.org> <3eac1295-dba2-ad79-d868-b538b13de91a@codeaurora.org> <67a696ad-98e9-d505-1d73-7246d2efc398@codeaurora.org> <59DF4AD9.2060903@huawei.com> <20171012110538.GA8509@red-moon> Message-ID: <59DF4DFF.9070609@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2017/10/12 19:05, Lorenzo Pieralisi wrote: > On Thu, Oct 12, 2017 at 06:58:33PM +0800, Hanjun Guo wrote: >> On 2017/8/11 11:28, Leeder, Neil wrote: >>> On 8/9/2017 9:26 PM, Hanjun Guo wrote: >>>>> On 2017/8/9 23:48, Leeder, Neil wrote: >>>>>>>>>>> drivers/perf/Kconfig | 9 + >>>>>>>>>>> drivers/perf/Makefile | 1 + >>>>>>>>>>> drivers/perf/arm_smmuv3_pmu.c | 823 ++++++++++++++++++++++++++++++++++++++++++ >>>>>>>>>>> include/acpi/actbl2.h | 9 +- >>>>>>>>> Do you have the acpica support code? I'm currently >>>>>>>>> working on SMMUv3 MSI support and I would like to test >>>>>>>>> it with MSI support for PMCG as well. >>>>>>> I don't have any code other than what was posted here. >>>>>>> What additional ACPICA support code is needed? >>>>> Sorry for not clear, I mean the acpica code for iASL and >>>>> other tool: github.com/acpica/acpica.git >>>>> >>>>> With that code, I can compile my IORT table with PMCG node. >>> Unfortunately it looks like I'm the first person from Qualcomm Datacenter >>> Technologies to try to add something to ACPICA, which means I'll have to >>> kick off an internal legal process which may take some time. Unless someone >>> else wants to take a crack at it - and really, there's nothing more than is >>> in the ARM IORT spec - it could be a while before I can do that. >> Just a update, I sent a pull request to Bob for ACPICA changes, >> please take a look: >> >> https://github.com/acpica/acpica/pull/327 > You should not have done that. We need to update IORT specifications > for IORT PMCG before merging ACPICA PMCG support. > > Ask Robert to drop it straight away or I will. Sorry, I will do that, thanks for the reminder. Thanks Hanjun