From mboxrd@z Thu Jan 1 00:00:00 1970 From: hjl.tools@gmail.com Subject: Re: x86: PIE support and option to extend KASLR randomization Date: Sat, 23 Sep 2017 06:19:05 +0800 Message-ID: <59c58c7f.8256ca0a.15939.aa94@mx.google.com> References: <20170816151235.oamkdva6cwpc4cex@gmail.com> <20170817080920.5ljlkktngw2cisfg@gmail.com> <20170825080443.tvvr6wzs362cjcuu@gmail.com> <20170921155919.skpyt7dutod5ul4t@gmail.com> <20170922163225.bfrd5myl6d7deiim@gmail.com> <0c04349a-b9f1-5aae-517b-bd057705ae2e@zytor.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6277160620342490886==" Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dvWIV-0005Wr-D8 for xen-devel@lists.xenproject.org; Fri, 22 Sep 2017 22:19:47 +0000 Received: by mail-oi0-f49.google.com with SMTP id 199so422060oii.11 for ; Fri, 22 Sep 2017 15:19:45 -0700 (PDT) In-Reply-To: <0c04349a-b9f1-5aae-517b-bd057705ae2e@zytor.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: "H. Peter Anvin" , Kees Cook Cc: =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , Peter Zijlstra , Paul Gortmaker , Pavel Machek , Christoph Lameter , Ingo Molnar , Herbert Xu , Joerg Roedel , Matthias Kaehlcke , Borislav Petkov , Len Brown , Arnd Bergmann , Brian Gerst , Andy Lutomirski , Josh Poimboeuf Chris, Boris Ostrovsky , Ingo Molnar , Juergen Gross , "Rafael J . Wysocki" , "David S . Miller" , Thomas Gleixner , Tejun Heo , Paolo Bonzini , Tom Lendacky List-Id: xen-devel@lists.xenproject.org ,Andrew Morton ,"Paul E . McKenney" ,Nicolas Pitre ,Christopher Li ,"Rafael J . Wysocki" ,Lukas Wunner ,Mika Westerberg ,Dou Liyang ,Daniel Borkmann ,Alexei Starovoitov ,Masahiro Yamada ,Markus Trippelsdorf ,Steven Rostedt ,Rik van Riel ,David Howells ,Waiman Long ,Kyle Huey ,Peter Foley ,Tim Chen ,Catalin Marinas ,Ard Biesheuvel ,Michal Hocko ,Matthew Wilcox ,Paul Bolle ,Rob Landley ,Baoquan He ,Daniel Micay ,the arch/x86 maintainers ,Linux Crypto Mailing List ,LKML ,xen-devel ,kvm list ,Linux PM list ,linux-arch ,Sparse Mailing-list ,Kernel Hardening ,Linus Torvalds ,Peter Zijlstra ,Borislav Petkov From: "H.J. Lu" Message-ID: --===============6277160620342490886== Content-Type: multipart/alternative; boundary="----DCV1E2NVH8OXPCGELC0L4RHZQKF2KC" Content-Transfer-Encoding: 7bit ,Andrew Morton ,"Paul E . McKenney" ,Nicolas Pitre ,Christopher Li ,"Rafael J . Wysocki" ,Lukas Wunner ,Mika Westerberg ,Dou Liyang ,Daniel Borkmann ,Alexei Starovoitov ,Masahiro Yamada ,Markus Trippelsdorf ,Steven Rostedt ,Rik van Riel ,David Howells ,Waiman Long ,Kyle Huey ,Peter Foley ,Tim Chen ,Catalin Marinas ,Ard Biesheuvel ,Michal Hocko ,Matthew Wilcox ,Paul Bolle ,Rob Landley ,Baoquan He ,Daniel Micay ,the arch/x86 maintainers ,Linux Crypto Mailing List ,LKML ,xen-devel ,kvm list ,Linux PM list ,linux-arch ,Sparse Mailing-list ,Kernel Hardening ,Linus Torvalds ,Peter Zijlstra ,Borislav Petkov From: "H.J. Lu" Message-ID: ------DCV1E2NVH8OXPCGELC0L4RHZQKF2KC Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On September 23, 2017 3:06:16 AM GMT+08:00, "H=2E Peter Anvin" wrote: >On 09/22/17 11:57, Kees Cook wrote: >> On Fri, Sep 22, 2017 at 11:38 AM, H=2E Peter Anvin >wrote: >>> We lose EBX on 32 bits, but we don't lose RBX on 64 bits - since >x86-64 >>> has RIP-relative addressing there is no need for a dedicated PIC >register=2E >>=20 >> FWIW, since gcc 5, the PIC register isn't totally lost=2E It is now >> reusable, and that seems to have improved performance: >> https://gcc=2Egnu=2Eorg/gcc-5/changes=2Ehtml > >It still talks about a PIC register on x86-64, which confuses me=2E >Perhaps older gcc's would allocate a PIC register under certain >circumstances, and then lose it for the entire function? > >For i386, the PIC register is required by the ABI to be %ebx at the >point any PLT entry is called=2E Not an issue with -mno-plt which goes >straight to the GOT, although in most cases there needs to be a PIC >register to find the GOT unless load-time relocation is permitted=2E > > -hpa We need a static PIE option so that compiler can optimize it without using hidden visibility=2E H=2EJ=2E Sent from my Android device with K-9 Mail=2E Please excuse my brevity=2E ------DCV1E2NVH8OXPCGELC0L4RHZQKF2KC Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable

On September 23= , 2017 3:06:16 AM GMT+08:00, "H=2E Peter Anvin" <hpa@zytor=2Ec= om> wrote:
On 09/22/17 11:57, Kees Cook wrote:
 On Fri, Sep 22, 2017 at 11:38 AM, H=
=2E Peter Anvin <hpa@zytor=2Ecom> wrote:
 We lose EBX on 32 bits, but we don't lose RBX on=
 64 bits - since x86-64
 has RIP-relative addressing there is no need =
for a dedicated PIC register=2E
 
 FWIW, since gcc 5=
, the PIC register isn't totally lost=2E It is now
 reusable, and that=
 seems to have improved performance:
 https://gcc=2Egnu=2Eorg/gcc-5/changes=2Ehtml

It still talks about a PIC register on x86-64, which= confuses me=2E
Perhaps older gcc's would allocate a PIC register unde= r certain
circumstances, and then lose it for the entire function?

For i386, the PIC register is required by the ABI to be %ebx at the=
point any PLT entry is called=2E Not an issue with -mno-plt which go= es
straight to the GOT, although in most cases there needs to be a PIC=
register to find the GOT unless load-time relocation is permitted=2E<= br />
-hpa


We need a static PIE option so that compiler can optimize it
without using hidden visibility=2E

H=2EJ=2E
Sent from my Android device with K-9 Mail=2E Please excuse my brevity=2E ------DCV1E2NVH8OXPCGELC0L4RHZQKF2KC-- --===============6277160620342490886== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KWGVuLWRldmVs IG1haWxpbmcgbGlzdApYZW4tZGV2ZWxAbGlzdHMueGVuLm9yZwpodHRwczovL2xpc3RzLnhlbi5v cmcveGVuLWRldmVsCg== --===============6277160620342490886==--