From: Liran Alon <LIRAN.ALON@ORACLE.COM>
To: Paolo Bonzini <pbonzini@redhat.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: jmattson@google.com, david@redhat.com
Subject: Re: [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro
Date: Thu, 21 Dec 2017 14:41:08 +0200 [thread overview]
Message-ID: <5A3BABE4.7050507@ORACLE.COM> (raw)
In-Reply-To: <1513857062-44013-4-git-send-email-pbonzini@redhat.com>
On 21/12/17 13:51, Paolo Bonzini wrote:
> Remove duplicate expression in nested_vmx_prepare_msr_bitmap, and make
> the register names clearer in hardware_setup.
>
> Suggested-by: Jim Mattson <jmattson@google.com>
> Reviewed-by: Jim Mattson <jmattson@google.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> arch/x86/kvm/vmx.c | 19 +++++++++----------
> 1 file changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 68239aabec52..4771e9a771c4 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -5257,6 +5257,8 @@ static void pt_disable_intercept_for_msr(bool flag)
> }
> }
>
> +#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4))
> +
> static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_only)
> {
> __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv,
> @@ -7139,7 +7141,7 @@ static __init int hardware_setup(void)
> set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
>
> for (msr = 0x800; msr <= 0x8ff; msr++) {
> - if (msr == 0x839 /* TMCCT */)
> + if (msr == X2APIC_MSR(APIC_TMCCT))
> continue;
> vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);
> }
> @@ -7148,12 +7150,9 @@ static __init int hardware_setup(void)
> * TPR reads and writes can be virtualized even if virtual interrupt
> * delivery is not in use.
> */
> - vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
> -
> - /* EOI */
> - vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);
> - /* SELF-IPI */
> - vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);
> + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_R | MSR_TYPE_W, false);
> + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_EOI), MSR_TYPE_W, true);
> + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W, true);
>
> if (enable_ept)
> vmx_enable_tdp();
> @@ -10347,17 +10346,17 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu,
>
> nested_vmx_disable_intercept_for_msr(
> msr_bitmap_l1, msr_bitmap_l0,
> - APIC_BASE_MSR + (APIC_TASKPRI >> 4),
> + X2APIC_MSR(APIC_TASKPRI),
> MSR_TYPE_W);
>
> if (nested_cpu_has_vid(vmcs12)) {
> nested_vmx_disable_intercept_for_msr(
> msr_bitmap_l1, msr_bitmap_l0,
> - APIC_BASE_MSR + (APIC_EOI >> 4),
> + X2APIC_MSR(APIC_EOI),
> MSR_TYPE_W);
> nested_vmx_disable_intercept_for_msr(
> msr_bitmap_l1, msr_bitmap_l0,
> - APIC_BASE_MSR + (APIC_SELF_IPI >> 4),
> + X2APIC_MSR(APIC_SELF_IPI),
> MSR_TYPE_W);
> }
> kunmap(page);
>
Reviewed-by: Liran Alon <liran.alon@oracle.com>
next prev parent reply other threads:[~2017-12-21 12:54 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-21 11:50 [PATCH v2 0/3] KVM: vmx: MSR bitmap cleanups and optimizations Paolo Bonzini
2017-12-21 11:51 ` [PATCH 1/3] KVM: vmx: speed up MSR bitmap merge Paolo Bonzini
2017-12-21 11:51 ` [PATCH 2/3] KVM: vmx: simplify MSR bitmap setup Paolo Bonzini
2017-12-21 18:06 ` Jim Mattson
2017-12-21 11:51 ` [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro Paolo Bonzini
2017-12-21 12:41 ` Liran Alon [this message]
-- strict thread matches above, loose matches on Subject: below --
2017-12-20 12:05 [PATCH 0/3] KVM: vmx: MSR bitmap cleanups and optimizations Paolo Bonzini
2017-12-20 12:05 ` [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro Paolo Bonzini
2017-12-20 17:07 ` Jim Mattson
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