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* [PATCH v2] clk: exynos5433: Extend list of available AUD_PLL output frequencies
       [not found] <CGME20180212155239epcas2p34dad3d106036f65e5ee566a593a983e3@epcas2p3.samsung.com>
@ 2018-02-12 15:52 ` Sylwester Nawrocki
  2018-02-12 21:46   ` Chanwoo Choi
  0 siblings, 1 reply; 3+ messages in thread
From: Sylwester Nawrocki @ 2018-02-12 15:52 UTC (permalink / raw)
  To: linux-clk
  Cc: sboyd, mturquette, linux-samsung-soc, cw00.choi, linux-kernel,
	krzk, b.zolnierkie, m.szyprowski, Sylwester Nawrocki

Add one more entry to the exynos5433_aud_pll_rates table, this allows
to support audio sample rates: 48000, 96000, 192000 Hz with minimum
error. The M, P, S, K values re confirmed by the HW team.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index ebd18586e325..b08a9028653f 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -765,6 +765,7 @@ static const struct samsung_pll_rate_table exynos5433_aud_pll_rates[] __initcons
 	PLL_36XX_RATE(294912000U,  98, 1, 3,  19923),
 	PLL_36XX_RATE(288000000U,  96, 1, 3,      0),
 	PLL_36XX_RATE(252000000U,  84, 1, 3,      0),
+	PLL_36XX_RATE(196608001U, 197, 3, 3, -25690),
 	{ /* sentinel */ }
 };

--
2.14.2

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v2] clk: exynos5433: Extend list of available AUD_PLL output frequencies
  2018-02-12 15:52 ` [PATCH v2] clk: exynos5433: Extend list of available AUD_PLL output frequencies Sylwester Nawrocki
@ 2018-02-12 21:46   ` Chanwoo Choi
  2018-02-14 14:58     ` Sylwester Nawrocki
  0 siblings, 1 reply; 3+ messages in thread
From: Chanwoo Choi @ 2018-02-12 21:46 UTC (permalink / raw)
  To: Sylwester Nawrocki, linux-clk
  Cc: sboyd, mturquette, linux-samsung-soc, linux-kernel, krzk,
	b.zolnierkie, m.szyprowski

Hi,

On 2018년 02월 13일 00:52, Sylwester Nawrocki wrote:
> Add one more entry to the exynos5433_aud_pll_rates table, this allows
> to support audio sample rates: 48000, 96000, 192000 Hz with minimum
> error. The M, P, S, K values re confirmed by the HW team.
> 
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
>  drivers/clk/samsung/clk-exynos5433.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
> index ebd18586e325..b08a9028653f 100644
> --- a/drivers/clk/samsung/clk-exynos5433.c
> +++ b/drivers/clk/samsung/clk-exynos5433.c
> @@ -765,6 +765,7 @@ static const struct samsung_pll_rate_table exynos5433_aud_pll_rates[] __initcons
>  	PLL_36XX_RATE(294912000U,  98, 1, 3,  19923),
>  	PLL_36XX_RATE(288000000U,  96, 1, 3,      0),
>  	PLL_36XX_RATE(252000000U,  84, 1, 3,      0),
> +	PLL_36XX_RATE(196608001U, 197, 3, 3, -25690),
>  	{ /* sentinel */ }
>  };

Looks good to me.
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

-- 
Best Regards,
Chanwoo Choi
Samsung Electronics

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v2] clk: exynos5433: Extend list of available AUD_PLL output frequencies
  2018-02-12 21:46   ` Chanwoo Choi
@ 2018-02-14 14:58     ` Sylwester Nawrocki
  0 siblings, 0 replies; 3+ messages in thread
From: Sylwester Nawrocki @ 2018-02-14 14:58 UTC (permalink / raw)
  To: Chanwoo Choi
  Cc: linux-clk, sboyd, mturquette, linux-samsung-soc, linux-kernel,
	krzk, b.zolnierkie, m.szyprowski

On 02/12/2018 10:46 PM, Chanwoo Choi wrote:
> On 2018년 02월 13일 00:52, Sylwester Nawrocki wrote:
>> Add one more entry to the exynos5433_aud_pll_rates table, this allows
>> to support audio sample rates: 48000, 96000, 192000 Hz with minimum
>> error. The M, P, S, K values re confirmed by the HW team.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> ---
>>  drivers/clk/samsung/clk-exynos5433.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
>> index ebd18586e325..b08a9028653f 100644
>> --- a/drivers/clk/samsung/clk-exynos5433.c
>> +++ b/drivers/clk/samsung/clk-exynos5433.c
>> @@ -765,6 +765,7 @@ static const struct samsung_pll_rate_table exynos5433_aud_pll_rates[] __initcons
>>  	PLL_36XX_RATE(294912000U,  98, 1, 3,  19923),
>>  	PLL_36XX_RATE(288000000U,  96, 1, 3,      0),
>>  	PLL_36XX_RATE(252000000U,  84, 1, 3,      0),
>> +	PLL_36XX_RATE(196608001U, 197, 3, 3, -25690),
>>  	{ /* sentinel */ }
>>  };
> Looks good to me.
> Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

Thanks, patch applied to clk/samsung tree.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-02-14 14:59 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <CGME20180212155239epcas2p34dad3d106036f65e5ee566a593a983e3@epcas2p3.samsung.com>
2018-02-12 15:52 ` [PATCH v2] clk: exynos5433: Extend list of available AUD_PLL output frequencies Sylwester Nawrocki
2018-02-12 21:46   ` Chanwoo Choi
2018-02-14 14:58     ` Sylwester Nawrocki

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