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From: Luca Fancellu <Luca.Fancellu@arm.com>
To: Bertrand Marquis <Bertrand.Marquis@arm.com>
Cc: Xen-devel <xen-devel@lists.xenproject.org>,
	Wei Chen <Wei.Chen@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien@xen.org>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: Re: [PATCH v5 05/12] arm/sve: save/restore SVE context switch
Date: Thu, 20 Apr 2023 07:43:03 +0000	[thread overview]
Message-ID: <5AE27C3A-3857-4044-9010-F452C7CF7E6F@arm.com> (raw)
In-Reply-To: <2B510623-0438-4D01-A916-14A8DE8D0A8C@arm.com>


>>>> +void sve_save_state(struct vcpu *v)
>>>> +{
>>>> +    unsigned int sve_vl_bits = sve_decode_vl(v->domain->arch.sve_vl);
>>>> +    uint64_t *sve_ctx_zreg_end = v->arch.vfp.sve_context +
>>>> +            (sve_zreg_ctx_size(sve_vl_bits) / sizeof(uint64_t));
>>> 
>>> You do quite some computation here for something which does not change
>>> during the life of the VM.
>>> Could we save the context_end in the vcpu instead and just do this
>>> computation on init and free only ?
>> 
>> Yes sure, would you be ok to have it in struct vfp_state?
> 
> Yes definitely i would store it instead of the current sve_context.
> 

Hi Bertrand, 

These are the changes I’m doing to this patch to address your comment, are you ok with them?

diff --git a/xen/arch/arm/arm64/sve.c b/xen/arch/arm/arm64/sve.c
index f0eab18dc384..1fef466ba0aa 100644
--- a/xen/arch/arm/arm64/sve.c
+++ b/xen/arch/arm/arm64/sve.c
@@ -91,35 +91,35 @@ int sve_context_init(struct vcpu *v)
     if ( !ctx )
         return -ENOMEM;
 
-    v->arch.vfp.sve_context = ctx;
+    /* Point to the end of Z0-Z31 memory, just before FFR memory */
+    v->arch.vfp.sve_zreg_ctx_end = ctx +
+        (sve_zreg_ctx_size(sve_vl_bits) / sizeof(uint64_t));
 
     return 0;
 }
 
 void sve_context_free(struct vcpu *v)
 {
-    XFREE(v->arch.vfp.sve_context);
+    unsigned int sve_vl_bits = sve_decode_vl(v->domain->arch.sve_vl);
+
+    /* Point back to the beginning of Z0-Z31 + FFR memory */
+    v->arch.vfp.sve_zreg_ctx_end = v->arch.vfp.sve_zreg_ctx_end -
+        (sve_zreg_ctx_size(sve_vl_bits) / sizeof(uint64_t));
+
+    XFREE(v->arch.vfp.sve_zreg_ctx_end);
 }
 
 void sve_save_state(struct vcpu *v)
 {
-    unsigned int sve_vl_bits = sve_decode_vl(v->domain->arch.sve_vl);
-    uint64_t *sve_ctx_zreg_end = v->arch.vfp.sve_context +
-            (sve_zreg_ctx_size(sve_vl_bits) / sizeof(uint64_t));
-
     v->arch.zcr_el1 = READ_SYSREG(ZCR_EL1);
 
-    sve_save_ctx(sve_ctx_zreg_end, v->arch.vfp.fpregs, 1);
+    sve_save_ctx(v->arch.vfp.sve_zreg_ctx_end, v->arch.vfp.fpregs, 1);
 }
 
 void sve_restore_state(struct vcpu *v)
 {
-    unsigned int sve_vl_bits = sve_decode_vl(v->domain->arch.sve_vl);
-    uint64_t *sve_ctx_zreg_end = v->arch.vfp.sve_context +
-            (sve_zreg_ctx_size(sve_vl_bits) / sizeof(uint64_t));
-
     WRITE_SYSREG(v->arch.zcr_el1, ZCR_EL1);
     WRITE_SYSREG(v->arch.zcr_el2, ZCR_EL2);
 
-    sve_load_ctx(sve_ctx_zreg_end, v->arch.vfp.fpregs, 1);
+    sve_load_ctx(v->arch.vfp.sve_zreg_ctx_end, v->arch.vfp.fpregs, 1);
 }
diff --git a/xen/arch/arm/include/asm/arm64/vfp.h b/xen/arch/arm/include/asm/arm64/vfp.h
index 8af714cb8ecc..4aa371e85d26 100644
--- a/xen/arch/arm/include/asm/arm64/vfp.h
+++ b/xen/arch/arm/include/asm/arm64/vfp.h
@@ -13,10 +13,12 @@ struct vfp_state
      */
     uint64_t fpregs[64] __vfp_aligned;
     /*
-     * When SVE is enabled for the guest, sve_context contains memory to
-     * save/restore Z0-Z31 registers and FFR.
+     * When SVE is enabled for the guest, sve_zreg_ctx_end points to memory
+     * where Z0-Z31 registers and FFR can be saved/restored, it points at the
+     * end of the Z0-Z31 space and at the beginning of the FFR space, it's done
+     * like that to ease the save/restore assembly operations.
      */
-    uint64_t *sve_context;
+    uint64_t *sve_zreg_ctx_end;
     register_t fpcr;
     register_t fpexc32_el2;
     register_t fpsr;



  reply	other threads:[~2023-04-20  7:43 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-12  9:49 [PATCH v5 00/12] SVE feature for arm guests Luca Fancellu
2023-04-12  9:49 ` [PATCH v5 01/12] xen/arm: enable SVE extension for Xen Luca Fancellu
2023-04-13 12:47   ` Bertrand Marquis
2023-04-14 13:28     ` Luca Fancellu
2023-04-14 13:38       ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 02/12] xen/arm: add SVE vector length field to the domain Luca Fancellu
2023-04-13 12:47   ` Bertrand Marquis
2023-04-17  9:20     ` Jan Beulich
2023-04-13 12:57   ` Julien Grall
2023-04-13 13:24     ` Luca Fancellu
2023-04-13 13:30       ` Julien Grall
2023-04-13 14:05         ` Luca Fancellu
2023-04-13 16:10           ` Luca Fancellu
2023-04-13 19:53             ` Julien Grall
2023-04-13 19:52           ` Julien Grall
2023-04-14 11:07             ` Luca Fancellu
2023-04-14 17:16               ` Julien Grall
2023-04-12  9:49 ` [PATCH v5 03/12] xen/arm: Expose SVE feature to the guest Luca Fancellu
2023-04-13 12:47   ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 04/12] xen/arm: add SVE exception class handling Luca Fancellu
2023-04-13 13:02   ` Julien Grall
2023-04-13 13:27     ` Luca Fancellu
2023-04-14  8:40   ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 05/12] arm/sve: save/restore SVE context switch Luca Fancellu
2023-04-13 13:11   ` Julien Grall
2023-04-13 14:35     ` Luca Fancellu
2023-04-13 19:54       ` Julien Grall
2023-04-18 12:40   ` Bertrand Marquis
2023-04-19  7:09     ` Luca Fancellu
2023-04-19  7:13       ` Bertrand Marquis
2023-04-20  7:43         ` Luca Fancellu [this message]
2023-04-20  7:55           ` Bertrand Marquis
2023-04-20  7:58             ` Luca Fancellu
2023-04-20  8:33               ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 06/12] xen/common: add dom0 xen command line argument for Arm Luca Fancellu
2023-04-14  8:47   ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 07/12] xen: enable Dom0 to use SVE feature Luca Fancellu
2023-04-17  9:41   ` Jan Beulich
2023-04-20  6:25     ` Luca Fancellu
2023-04-20  7:56       ` Jan Beulich
2023-04-18 12:47   ` Bertrand Marquis
2023-04-19  6:34     ` Jan Beulich
2023-04-19  7:15     ` Luca Fancellu
2023-04-19  7:21       ` Bertrand Marquis
2023-04-19  7:41         ` Luca Fancellu
2023-04-20  8:46           ` Luca Fancellu
2023-04-20 12:00             ` Bertrand Marquis
2023-04-20 12:29             ` Julien Grall
2023-04-20 12:43               ` Luca Fancellu
2023-04-20 13:08                 ` Julien Grall
2023-04-20 13:18                   ` Luca Fancellu
2023-04-12  9:49 ` [PATCH v5 08/12] xen/physinfo: encode Arm SVE vector length in arch_capabilities Luca Fancellu
2023-04-18 12:49   ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 09/12] tools: add physinfo arch_capabilities handling for Arm Luca Fancellu
2023-04-12  9:49 ` [PATCH v5 10/12] xen/tools: add sve parameter in XL configuration Luca Fancellu
2023-04-12  9:49 ` [PATCH v5 11/12] xen/arm: add sve property for dom0less domUs Luca Fancellu
2023-04-18 12:55   ` Bertrand Marquis
2023-04-18 13:21     ` Bertrand Marquis
2023-04-12  9:49 ` [PATCH v5 12/12] xen/changelog: Add SVE and "dom0" options to the changelog for Arm Luca Fancellu
2023-04-12  9:53   ` Henry Wang
2023-04-18 12:56   ` Bertrand Marquis
2023-04-19  7:11     ` Luca Fancellu
2023-04-19  7:16       ` Bertrand Marquis
2023-04-18 13:13 ` [PATCH v5 00/12] SVE feature for arm guests Bertrand Marquis
2023-04-18 14:25   ` Julien Grall
2023-04-18 14:38     ` Bertrand Marquis
2023-04-18 14:41       ` Luca Fancellu
2023-04-18 15:00         ` Bertrand Marquis
2023-04-19  6:28     ` Jan Beulich
2023-04-19  7:31       ` Bertrand Marquis
2023-04-19  7:46         ` Julien Grall
2023-04-19  7:52         ` Jan Beulich
2023-04-19  8:20           ` Bertrand Marquis
2023-04-20 12:30             ` Julien Grall

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