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From: "Jan Beulich" <JBeulich@suse.com>
To: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>,
	JanakarajanNatarajan <jnataraj@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Kevin Tian <kevin.tian@intel.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	George Dunlap <George.Dunlap@eu.citrix.com>,
	Tim Deegan <tim@xen.org>, Ian Jackson <Ian.Jackson@eu.citrix.com>,
	xen-devel@lists.xen.org, Julien Grall <julien.grall@arm.com>,
	Jun Nakajima <jun.nakajima@intel.com>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: Re: [PATCH v2 05/10] x86/SVM: Add AVIC vmexit handlers
Date: Wed, 30 May 2018 01:24:36 -0600	[thread overview]
Message-ID: <5B0E51B402000078001C6D63@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <453a59cb-3d24-9eeb-0daa-3a7405b5ad03@citrix.com>

>>> On 30.05.18 at 01:33, <andrew.cooper3@citrix.com> wrote:
>> Would this be better suited ?
> 
> Almost.
> 
> The purpose of the validate function is to fix an inherent race
> condition which occurs with a vmexit.
> 
> After a vmexit, rereading the instruction for emulation is inherently
> racy, and a malicious VM could rewrite the instruction stream while the
> vmexit is occuring.  As a result, we provide a validate function to
> check that the instruction decoded matches one which plausibly broke for
> emulation here.
> 
> Therefore, you want a validate function which checks that the
> instruction has a memory operand, and that it falls within the 4k region
> which maps the APIC registers.

The validate hook is called right after decode, i.e. before operands have
been evaluated, so the latter part of what you suggest cannot be done.

Jan



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  reply	other threads:[~2018-05-30  7:24 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-07 21:07 [PATCH v2 00/10] Introduce AMD SVM AVIC Janakarajan Natarajan
2018-05-07 21:07 ` [PATCH v2 01/10] x86/SVM: Modify VMCB fields to add AVIC support Janakarajan Natarajan
2018-05-07 21:07 ` [PATCH v2 02/10] x86/HVM: Rename vlapic_read_aligned() to vlapic_reg_read() Janakarajan Natarajan
2018-05-08 10:12   ` Wei Liu
2018-05-16 14:36   ` Jan Beulich
2018-05-07 21:07 ` [PATCH v2 03/10] x86/HVM: Make vlapic_reg_read/write() non-static Janakarajan Natarajan
2018-05-16 14:38   ` Jan Beulich
2018-05-16 14:44   ` Jan Beulich
2018-05-07 21:07 ` [PATCH v2 04/10] x86/HVM/SVM: Add AVIC initialization code Janakarajan Natarajan
2018-05-16 15:29   ` Jan Beulich
2018-05-16 15:41     ` Andrew Cooper
2018-05-21 18:41     ` Natarajan, Janakarajan
2018-05-22  9:19       ` Jan Beulich
2018-05-07 21:07 ` [PATCH v2 05/10] x86/SVM: Add AVIC vmexit handlers Janakarajan Natarajan
2018-05-16 15:56   ` Jan Beulich
2018-05-29 21:49     ` Natarajan, Janakarajan
2018-05-29 23:33       ` Andrew Cooper
2018-05-30  7:24         ` Jan Beulich [this message]
2018-05-30 18:30           ` Natarajan, Janakarajan
2018-05-30 23:23             ` Andrew Cooper
2018-05-07 21:07 ` [PATCH v2 06/10] x86/SVM: Add vcpu scheduling support for AVIC Janakarajan Natarajan
2018-05-17 14:45   ` Jan Beulich
2018-05-07 21:07 ` [PATCH v2 07/10] x86/SVM: Add interrupt management code via AVIC Janakarajan Natarajan
2018-05-17 14:50   ` Jan Beulich
2018-05-30 19:47     ` Natarajan, Janakarajan
2018-05-07 21:07 ` [PATCH v2 08/10] x86/HVM: Hook up miscellaneous AVIC functions Janakarajan Natarajan
2018-05-07 21:07 ` [PATCH v2 09/10] x86/SVM: Introduce svm command line option Janakarajan Natarajan
2018-05-17 14:54   ` Jan Beulich
2018-05-07 21:07 ` [PATCH v2 10/10] x86/SVM: Append AMD AVIC related data to IRQ keyhandler 'i' Janakarajan Natarajan
2018-05-17 14:56   ` Jan Beulich

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