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[91.12.98.165]) by smtp.gmail.com with ESMTPSA id d7sm4925994wrx.11.2019.11.11.09.05.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Nov 2019 09:05:38 -0800 (PST) From: David Hildenbrand Mime-Version: 1.0 (1.0) Subject: Re: [PATCH v2] s390x: Properly fetch the short psw on diag308 subc 0/1 Date: Mon, 11 Nov 2019 18:05:37 +0100 Message-Id: <5B7A4B70-BF58-4760-AD97-4BAB7EDDF01D@redhat.com> References: <20191111152808.13371-1-frankja@linux.ibm.com> In-Reply-To: <20191111152808.13371-1-frankja@linux.ibm.com> To: Janosch Frank X-Mailer: iPhone Mail (17A878) X-MC-Unique: tjeWhDjPOEKV3JeNd2xxXw-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: borntraeger@de.ibm.com, cohuck@redhat.com, qemu-devel@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" > Am 11.11.2019 um 16:28 schrieb Janosch Frank : >=20 > =EF=BB=BFWe need to actually fetch the cpu mask and set it. As we invert = the > short psw indication in the mask, SIE will report a specification > exception, if it wasn't present in the reset psw. >=20 > Signed-off-by: Janosch Frank > --- > target/s390x/cpu.c | 12 ++++++++++-- > target/s390x/cpu.h | 1 + > 2 files changed, 11 insertions(+), 2 deletions(-) >=20 > diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c > index 736a7903e2..40aa42e092 100644 > --- a/target/s390x/cpu.c > +++ b/target/s390x/cpu.c > @@ -76,8 +76,16 @@ static bool s390_cpu_has_work(CPUState *cs) > static void s390_cpu_load_normal(CPUState *s) > { > S390CPU *cpu =3D S390_CPU(s); > - cpu->env.psw.addr =3D ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; > - cpu->env.psw.mask =3D PSW_MASK_32 | PSW_MASK_64; > + uint64_t spsw =3D ldq_phys(s->as, 0); > + > + cpu->env.psw.mask =3D spsw & 0xffffffff80000000UL; ULL > + /* > + * Invert short psw indication, so SIE will report a specification > + * exception if it was not set. > + */ It would be interesting to know how the PSW mask in the PGM old PSW looks l= ike on LPAR. IOW, =E2=80=9Eyou forgot to set the short indication, here is = an exception. see, the short indication is set now.=E2=80=9C Sounds weird, = most probably nobody cares. > + cpu->env.psw.mask ^=3D PSW_MASK_SHORTPSW; > + cpu->env.psw.addr =3D spsw & 0x7fffffffUL; Eventually also ULL > + > s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu); > } > #endif > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h > index 947553386f..2c687185f1 100644 > --- a/target/s390x/cpu.h > +++ b/target/s390x/cpu.h > @@ -261,6 +261,7 @@ extern const struct VMStateDescription vmstate_s390_c= pu; > #define PSW_MASK_EXT 0x0100000000000000ULL > #define PSW_MASK_KEY 0x00F0000000000000ULL > #define PSW_SHIFT_KEY 52 > +#define PSW_MASK_SHORTPSW 0x0008000000000000ULL > #define PSW_MASK_MCHECK 0x0004000000000000ULL > #define PSW_MASK_WAIT 0x0002000000000000ULL > #define PSW_MASK_PSTATE 0x0001000000000000ULL > --=20 > 2.20.1 >=20 Looks good to me Reviewed-by: David Hildenbrand