From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aNxkj-0008AI-9X for qemu-devel@nongnu.org; Tue, 26 Jan 2016 02:09:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aNxkg-0001R9-3P for qemu-devel@nongnu.org; Tue, 26 Jan 2016 02:09:25 -0500 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (1.0) From: Alexander Graf In-Reply-To: <20160126054129.GB16692@voom.fritz.box> Date: Tue, 26 Jan 2016 08:09:20 +0100 Content-Transfer-Encoding: quoted-printable Message-Id: <5F582A1D-D773-40F8-9F77-F63CF2A68161@suse.de> References: <1453698952-32092-1-git-send-email-david@gibson.dropbear.id.au> <20160125111040.GH32205@voom.redhat.com> <56A68758.8090805@suse.de> <20160126054129.GB16692@voom.fritz.box> Subject: Re: [Qemu-devel] [PATCH 00/10] Clean up page size handling for ppc 64-bit hash MMUs with TCG List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: lvivier@redhat.com, thuth@redhat.com, aik@ozlabs.ru, qemu-devel@nongnu.org, qemu-ppc@nongnu.org > Am 26.01.2016 um 06:41 schrieb David Gibson := >=20 >> On Mon, Jan 25, 2016 at 09:36:40PM +0100, Alexander Graf wrote: >>=20 >>=20 >>> On 01/25/2016 12:10 PM, David Gibson wrote: >>>> On Mon, Jan 25, 2016 at 04:15:42PM +1100, David Gibson wrote: >>>> Encoding of page sizes on 64-bit hash MMUs for Power is rather arcane, >>>> involving control bits in both the SLB and HPTE. At present we >>>> support a few of the options, but far fewer than real hardware. >>>>=20 >>>> We're able to get away with that in practice, because guests use a >>>> device tree property to determine which page sizes are available and >>>> we are setting that to match. However, the fact that the actual code >>>> doesn't necessarily what we put into the table of available page sizes >>>> is another ugliness. >>>>=20 >>>> This series makes a number of cleanups to the page size handling. The >>>> upshot is that afterwards the softmmu code operates off the same page >>>> size encoding table that is advertised to the guests, ensuring that >>>> they will be in sync. >>>>=20 >>>> Finally, we extend the table of allowed sizes for POWER7 and POWER8 to >>>> include the options allowed in hardware (including MPSS). We can fix >>>> other hash MMU based CPUs in future if anyone cares enough. >>>>=20 >>>> Please review, and I'll fold into ppc-for-2.6 for my next pull. >>> Bother, somehow missed a serious bug in here that's causing >>> oops-on-boot. Sorry, still tracking it down. >>=20 >> I still have no idea where your bug is (bisect probably should get you th= ere >> pretty quick), >=20 > Alas, no, because the bug only triggers once all the page sizes are > added for POWER8 in the last patch. >=20 > Luckily I found it anyway (see earlier reply). >=20 >> but the overall concept sounds very reasonable to me. Please >> benchmark performance before and after in the next cover letter also >> :) >=20 > Hrm.. as always the question is what benchmark? For this "time" on a simple kernel boot+automatic shutdown sequence should b= e enough. Alex >=20 >>=20 >> Reviewed-by: Alexander Graf >>=20 >> Alex >=20 > --=20 > David Gibson | I'll have my music baroque, and my code > david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _oth= er_ > | _way_ _around_! > http://www.ozlabs.org/~dgibson