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From: Auger Eric <eric.auger@redhat.com>
To: Andrew Jones <drjones@redhat.com>
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
	qemu-devel@nongnu.org, armbru@redhat.com, qemu-arm@nongnu.org,
	imammedo@redhat.com, alex.bennee@linaro.org, Dave.Martin@arm.com
Subject: Re: [PATCH v4 8/9] target/arm/cpu64: max cpu: Support sve properties with KVM
Date: Thu, 26 Sep 2019 13:50:30 +0200	[thread overview]
Message-ID: <5a13b82c-25c0-f0fd-34a6-1278fbda4f12@redhat.com> (raw)
In-Reply-To: <20190926114003.2jw5f5orkjrzdhvo@kamzik.brq.redhat.com>

Hi Drew,

On 9/26/19 1:40 PM, Andrew Jones wrote:
> On Thu, Sep 26, 2019 at 12:01:36PM +0200, Auger Eric wrote:
>>
>>
>> On 9/26/19 10:41 AM, Andrew Jones wrote:
>>> On Thu, Sep 26, 2019 at 08:52:55AM +0200, Auger Eric wrote:
>>>> Hi Drew,
>>>>
>>>> On 9/24/19 1:31 PM, Andrew Jones wrote:
>>>>> Extend the SVE vq map initialization and validation with KVM's
>>>>> supported vector lengths when KVM is enabled. In order to determine
>>>>> and select supported lengths we add two new KVM functions for getting
>>>>> and setting the KVM_REG_ARM64_SVE_VLS pseudo-register.
>>>>>
>>>>> This patch has been co-authored with Richard Henderson, who reworked
>>>>> the target/arm/cpu64.c changes in order to push all the validation and
>>>>> auto-enabling/disabling steps into the finalizer, resulting in a nice
>>>>> LOC reduction.
>>>>>
>>>>> Signed-off-by: Andrew Jones <drjones@redhat.com>
>>>>> ---
>>>>>  docs/arm-cpu-features.rst |  36 +++++---
>>>>>  target/arm/cpu64.c        | 167 +++++++++++++++++++++++++++++---------
>>>>>  target/arm/kvm64.c        | 100 ++++++++++++++++++++++-
>>>>>  target/arm/kvm_arm.h      |  12 +++
>>>>>  tests/arm-cpu-features.c  | 105 +++++++++++++++++++++++-
>>>>>  5 files changed, 368 insertions(+), 52 deletions(-)
>>>>>
>>>>> diff --git a/docs/arm-cpu-features.rst b/docs/arm-cpu-features.rst
>>>>> index 1262fddc6201..939366f959cf 100644
>>>>> --- a/docs/arm-cpu-features.rst
>>>>> +++ b/docs/arm-cpu-features.rst
>>>>> @@ -188,10 +188,17 @@ SVE CPU Property Dependencies and Constraints
>>>>>  
>>>>>    1) At least one vector length must be enabled when `sve` is enabled.
>>>>>  
>>>>> -  2) If a vector length `N` is enabled, then all power-of-two vector
>>>>> -     lengths smaller than `N` must also be enabled.  E.g. if `sve512`
>>>>> -     is enabled, then `sve128` and `sve256` must also be enabled,
>>>>> -     but `sve384` is not required.
>>>>> +  2) If a vector length `N` is enabled, then, when KVM is enabled, all
>>>>> +     smaller, host supported vector lengths must also be enabled.  If
>>>>> +     KVM is not enabled, then only all the smaller, power-of-two vector
>>>>> +     lengths must be enabled.  E.g. with KVM if the host supports all
>>>>> +     vector lengths up to 512-bits (128, 256, 384, 512), then if
>>>>> +     `sve512` is enabled, `sve128`, `sve256`, and `sve384` must also
>>>>> +     be enabled. Without KVM, `sve384` would not be required.
>>>>> +
>>>>> +  3) If KVM is enabled then only vector lengths that the host CPU type
>>>>> +     support may be enabled.  If SVE is not supported by the host, then
>>>>> +     no `sve*` properties may be enabled.
>>>>>  
>>>>>  SVE CPU Property Parsing Semantics
>>>>>  ----------------------------------
>>>>> @@ -210,20 +217,29 @@ SVE CPU Property Parsing Semantics
>>>>>       disable the last enabled vector length (see constraint (1) of "SVE
>>>>>       CPU Property Dependencies and Constraints").
>>>>>  
>>>>> -  4) If one or more `sve<N>` CPU properties are set `off`, but no `sve<N>`,
>>>>> +  4) When KVM is enabled, if the host does not support SVE, then an error
>>>>> +     is generated when attempting to enable any `sve*` properties.
>>>>> +
>>>>> +  5) When KVM is enabled, if the host does support SVE, then an error is
>>>>> +     generated when attempting to enable any vector lengths not supported
>>>>> +     by the host.
>>>>> +
>>>>> +  6) If one or more `sve<N>` CPU properties are set `off`, but no `sve<N>`,
>>>>>       CPU properties are set `on`, then the specified vector lengths are
>>>>>       disabled but the default for any unspecified lengths remains enabled.
>>>>> -     Disabling a power-of-two vector length also disables all vector
>>>>> -     lengths larger than the power-of-two length (see constraint (2) of
>>>>> -     "SVE CPU Property Dependencies and Constraints").
>>>>> +     When KVM is not enabled, disabling a power-of-two vector length also
>>>>> +     disables all vector lengths larger than the power-of-two length.
>>>>> +     When KVM is enabled, then disabling any supported vector length also
>>>>> +     disables all larger vector lengths (see constraint (2) of "SVE CPU
>>>>> +     Property Dependencies and Constraints").
>>>>>  
>>>>> -  5) If one or more `sve<N>` CPU properties are set to `on`, then they
>>>>> +  7) If one or more `sve<N>` CPU properties are set to `on`, then they
>>>>>       are enabled and all unspecified lengths default to disabled, except
>>>>>       for the required lengths per constraint (2) of "SVE CPU Property
>>>>>       Dependencies and Constraints", which will even be auto-enabled if
>>>>>       they were not explicitly enabled.
>>>>>  
>>>>> -  6) If SVE was disabled (`sve=off`), allowing all vector lengths to be
>>>>> +  8) If SVE was disabled (`sve=off`), allowing all vector lengths to be
>>>>>       explicitly disabled (i.e. avoiding the error specified in (3) of
>>>>>       "SVE CPU Property Parsing Semantics"), then if later an `sve=on` is
>>>>>       provided an error will be generated.  To avoid this error, one must
>>>>> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
>>>>> index b7eff4e1e107..18dd5e24ec61 100644
>>>>> --- a/target/arm/cpu64.c
>>>>> +++ b/target/arm/cpu64.c
>>>>> @@ -273,9 +273,18 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
>>>>>       * any of the above.  Finally, if SVE is not disabled, then at least one
>>>>>       * vector length must be enabled.
>>>>>       */
>>>>> +    DECLARE_BITMAP(kvm_supported, ARM_MAX_VQ);
>>>>>      DECLARE_BITMAP(tmp, ARM_MAX_VQ);
>>>>>      uint32_t vq, max_vq = 0;
>>>>>  
>>>>> +    /* Collect the set of vector lengths supported by KVM. */
>>>>> +    bitmap_zero(kvm_supported, ARM_MAX_VQ);
>>>>> +    if (kvm_enabled() && kvm_arm_sve_supported(CPU(cpu))) {
>>>>> +        kvm_arm_sve_get_vls(CPU(cpu), kvm_supported);
>>>>> +    } else if (kvm_enabled()) {
>>>>> +        assert(!cpu_isar_feature(aa64_sve, cpu));
>>>> why not set an error and propagate it instead?
>>>
>>> This should never happen. We shouldn't be here if KVM is enabled and SVE
>>> isn't supported. The question is how defensive do we want QEMU code?
>>> We could just drop the check altogether if we don't want the assert, but
>>> I'd rather keep it.
>>>
>>>>> +    }
>>>>> +
>>>>>      /*
>>>>>       * Process explicit sve<N> properties.
>>>>>       * From the properties, sve_vq_map<N> implies sve_vq_init<N>.
>>>>> @@ -293,10 +302,19 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
>>>>>              return;
>>>>>          }
>>>>>  
>>>>> -        /* Propagate enabled bits down through required powers-of-two. */
>>>>> -        for (vq = pow2floor(max_vq); vq >= 1; vq >>= 1) {
>>>>> -            if (!test_bit(vq - 1, cpu->sve_vq_init)) {
>>>>> -                set_bit(vq - 1, cpu->sve_vq_map);
>>>>> +        if (kvm_enabled()) {
>>>>> +            /*
>>>>> +             * For KVM we have to automatically enable all supported unitialized
>>>>> +             * lengths, even when the smaller lengths are not all powers-of-two.
>>>>> +             */
>>>>> +            bitmap_andnot(tmp, kvm_supported, cpu->sve_vq_init, max_vq);
>>>>> +            bitmap_or(cpu->sve_vq_map, cpu->sve_vq_map, tmp, max_vq);
>>>>> +        } else {
>>>>> +            /* Propagate enabled bits down through required powers-of-two. */
>>>>> +            for (vq = pow2floor(max_vq); vq >= 1; vq >>= 1) {
>>>>> +                if (!test_bit(vq - 1, cpu->sve_vq_init)) {
>>>>> +                    set_bit(vq - 1, cpu->sve_vq_map);
>>>>> +                }
>>>>>              }
>>>>>          }
>>>>>      } else if (cpu->sve_max_vq == 0) {
>>>>> @@ -308,23 +326,46 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
>>>>>              return;
>>>>>          }
>>>>>  
>>>>> -        /* Disabling a power-of-two disables all larger lengths. */
>>>>> -        if (test_bit(0, cpu->sve_vq_init)) {
>>>>> -            error_setg(errp, "cannot disable sve128");
>>>>> -            error_append_hint(errp, "Disabling sve128 results in all vector "
>>>>> -                              "lengths being disabled.\n");
>>>>> -            error_append_hint(errp, "With SVE enabled, at least one vector "
>>>>> -                              "length must be enabled.\n");
>>>>> -            return;
>>>>> -        }
>>>>> -        for (vq = 2; vq <= ARM_MAX_VQ; vq <<= 1) {
>>>>> -            if (test_bit(vq - 1, cpu->sve_vq_init)) {
>>>>> -                break;
>>>>> +        if (kvm_enabled()) {
>>>>> +            /* Disabling a supported length disables all larger lengths. */
>>>>> +            for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
>>>>> +                if (test_bit(vq - 1, cpu->sve_vq_init) &&
>>>>> +                    test_bit(vq - 1, kvm_supported)) {
>>>>> +                    break;
>>>>> +                }
>> the above loop looks for the 1st disabled vq that is also supported, right?
> 
> Right
> 
>>>>> +            }
>>>>> +            max_vq = vq <= ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ;
>>>>> +            bitmap_andnot(cpu->sve_vq_map, kvm_supported,
>>>>> +                          cpu->sve_vq_init, max_vq);
>>>>> +            if (max_vq == 0 || bitmap_empty(cpu->sve_vq_map, max_vq)) {
>> here we don't have anything enabled below the disabled one. So don't we
>> have the culprit already?
> 
> Oh, you're right. We can drop the find_next_bit call. Thanks for catching
> that.
> 
>>>>> +                vq = find_next_bit(kvm_supported, ARM_MAX_VQ, 0) + 1;
>>>>> +                error_setg(errp, "cannot disable sve%d", vq * 128);
>>>> isn't the one disabled max_vq? Do you really need to re-compute vq?
> 
> vq != max_vq here. max_vq is one smaller, even 0 if vq=1. So while vq
> is already correct, as you've pointed out, we need to use specifically
> that, not max_vq.
OK

Thanks

Eric
> 
> Thanks,
> drew
> 


  reply	other threads:[~2019-09-26 11:51 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-24 11:30 [PATCH v4 0/9] target/arm/kvm: enable SVE in guests Andrew Jones
2019-09-24 11:30 ` [PATCH v4 1/9] target/arm/monitor: Introduce qmp_query_cpu_model_expansion Andrew Jones
2019-09-24 15:06   ` Auger Eric
2019-09-24 11:30 ` [PATCH v4 2/9] tests: arm: Introduce cpu feature tests Andrew Jones
2019-09-24 11:30 ` [PATCH v4 3/9] target/arm: Allow SVE to be disabled via a CPU property Andrew Jones
2019-09-24 15:06   ` Auger Eric
2019-09-24 11:31 ` [PATCH v4 4/9] target/arm/cpu64: max cpu: Introduce sve<N> properties Andrew Jones
2019-09-24 13:55   ` Andrew Jones
2019-09-25 13:53   ` Auger Eric
2019-09-26  8:21     ` Andrew Jones
2019-09-26  9:34       ` Auger Eric
2019-09-26 11:14         ` Andrew Jones
2019-09-26 19:07   ` Richard Henderson
2019-09-26 23:50     ` Alex Bennée
2019-09-27  6:51       ` Andrew Jones
2019-09-27  6:45     ` Andrew Jones
2019-09-24 11:31 ` [PATCH v4 5/9] target/arm/kvm64: Add kvm_arch_get/put_sve Andrew Jones
2019-09-25 13:58   ` Auger Eric
2019-09-27 13:00   ` Andrew Jones
2019-10-01  6:53   ` Andrew Jones
2019-09-24 11:31 ` [PATCH v4 6/9] target/arm/kvm64: max cpu: Enable SVE when available Andrew Jones
2019-09-26  6:53   ` Auger Eric
2019-09-24 11:31 ` [PATCH v4 7/9] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features Andrew Jones
2019-09-24 11:31 ` [PATCH v4 8/9] target/arm/cpu64: max cpu: Support sve properties with KVM Andrew Jones
2019-09-26  6:52   ` Auger Eric
2019-09-26  8:41     ` Andrew Jones
2019-09-26 10:01       ` Auger Eric
2019-09-26 11:40         ` Andrew Jones
2019-09-26 11:50           ` Auger Eric [this message]
2019-09-24 11:31 ` [PATCH v4 9/9] target/arm/kvm: host cpu: Add support for sve<N> properties Andrew Jones
2019-09-26  7:07   ` Auger Eric
2019-09-26  8:53     ` Andrew Jones

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