From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Subject: Re: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS To: Jean-Philippe Brucker References: <20170227195441.5170-1-jean-philippe.brucker@arm.com> <20170227195441.5170-5-jean-philippe.brucker@arm.com> From: Sinan Kaya Message-ID: <5a7822f2-3991-aa51-169f-78ef49567feb@codeaurora.org> Date: Wed, 1 Mar 2017 14:24:00 -0500 MIME-Version: 1.0 In-Reply-To: <20170227195441.5170-5-jean-philippe.brucker@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Harb Abdulhamid , Lorenzo Pieralisi , Shanker Donthineni , kvm@vger.kernel.org, Catalin Marinas , Joerg Roedel , Will Deacon , iommu@lists.linux-foundation.org, Sinan Kaya , Alex Williamson , linux-pci@vger.kernel.org, Bjorn Helgaas , Robin Murphy , David Woodhouse , linux-arm-kernel@lists.infradead.org, Nate Watterson Content-Type: text/plain; charset="us-ascii" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: On 2/27/2017 2:54 PM, Jean-Philippe Brucker wrote: > /* Initialise command lazily */ > + if (!cmd.opcode) > + arm_smmu_atc_invalidate_to_cmd(smmu, iova, size, &cmd); > + > + spin_lock(&smmu_group->devices_lock); > + > + list_for_each_entry(master, &smmu_group->devices, group_head) > + arm_smmu_atc_invalidate_master(master, &cmd); > + > + /* > + * TODO: ensure we do a sync whenever we have sent ats_queue_depth > + * invalidations to the same device. > + */ > + arm_smmu_cmdq_issue_cmd(smmu, &sync_cmd); > + It is possible to observe ATS invalidation timeout up to 90 seconds according to PCIe spec. How does the current code deal with this? -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sinan Kaya Subject: Re: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS Date: Wed, 1 Mar 2017 14:24:00 -0500 Message-ID: <5a7822f2-3991-aa51-169f-78ef49567feb@codeaurora.org> References: <20170227195441.5170-1-jean-philippe.brucker@arm.com> <20170227195441.5170-5-jean-philippe.brucker@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Harb Abdulhamid , Shanker Donthineni , kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Catalin Marinas , Will Deacon , iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, Sinan Kaya , linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Bjorn Helgaas , David Woodhouse , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Nate Watterson To: Jean-Philippe Brucker Return-path: In-Reply-To: <20170227195441.5170-5-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: kvm.vger.kernel.org On 2/27/2017 2:54 PM, Jean-Philippe Brucker wrote: > /* Initialise command lazily */ > + if (!cmd.opcode) > + arm_smmu_atc_invalidate_to_cmd(smmu, iova, size, &cmd); > + > + spin_lock(&smmu_group->devices_lock); > + > + list_for_each_entry(master, &smmu_group->devices, group_head) > + arm_smmu_atc_invalidate_master(master, &cmd); > + > + /* > + * TODO: ensure we do a sync whenever we have sent ats_queue_depth > + * invalidations to the same device. > + */ > + arm_smmu_cmdq_issue_cmd(smmu, &sync_cmd); > + It is possible to observe ATS invalidation timeout up to 90 seconds according to PCIe spec. How does the current code deal with this? -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. From mboxrd@z Thu Jan 1 00:00:00 1970 From: okaya@codeaurora.org (Sinan Kaya) Date: Wed, 1 Mar 2017 14:24:00 -0500 Subject: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS In-Reply-To: <20170227195441.5170-5-jean-philippe.brucker@arm.com> References: <20170227195441.5170-1-jean-philippe.brucker@arm.com> <20170227195441.5170-5-jean-philippe.brucker@arm.com> Message-ID: <5a7822f2-3991-aa51-169f-78ef49567feb@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2/27/2017 2:54 PM, Jean-Philippe Brucker wrote: > /* Initialise command lazily */ > + if (!cmd.opcode) > + arm_smmu_atc_invalidate_to_cmd(smmu, iova, size, &cmd); > + > + spin_lock(&smmu_group->devices_lock); > + > + list_for_each_entry(master, &smmu_group->devices, group_head) > + arm_smmu_atc_invalidate_master(master, &cmd); > + > + /* > + * TODO: ensure we do a sync whenever we have sent ats_queue_depth > + * invalidations to the same device. > + */ > + arm_smmu_cmdq_issue_cmd(smmu, &sync_cmd); > + It is possible to observe ATS invalidation timeout up to 90 seconds according to PCIe spec. How does the current code deal with this? -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.