From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37403) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cJTfJ-0004Vf-Q3 for qemu-devel@nongnu.org; Tue, 20 Dec 2016 18:17:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cJTfE-0002Ce-Qa for qemu-devel@nongnu.org; Tue, 20 Dec 2016 18:17:49 -0500 Received: from mail-bl2nam02on0068.outbound.protection.outlook.com ([104.47.38.68]:45216 helo=NAM02-BL2-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cJTfE-0002C4-LN for qemu-devel@nongnu.org; Tue, 20 Dec 2016 18:17:44 -0500 From: Alistair Francis Date: Tue, 20 Dec 2016 14:42:06 -0800 Message-ID: <5b9a682feb30a4c22b068d698d65063c299d24cf.1482265908.git.alistair.francis@xilinx.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH v3 3/3] xlnx-zynqmp: Connect the ARM Generic Timer List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, fred.konrad@greensocs.com Cc: alistair.francis@xilinx.com, alistair23@gmail.com Signed-off-by: Alistair Francis --- hw/arm/xlnx-zynqmp.c | 14 ++++++++++++++ include/hw/arm/xlnx-zynqmp.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 0d86ba3..f3891ae 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -38,6 +38,8 @@ #define SATA_ADDR 0xFD0C0000 #define SATA_NUM_PORTS 2 +#define ARM_GEN_TIMER_ADDR 0xFF260000 + #define DP_ADDR 0xfd4a0000 #define DP_IRQ 113 @@ -172,6 +174,10 @@ static void xlnx_zynqmp_init(Object *obj) qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default()); } + object_initialize(&s->arm_gen_timer, sizeof(s->arm_gen_timer), + TYPE_ARM_GEN_TIMER); + qdev_set_parent_bus(DEVICE(&s->arm_gen_timer), sysbus_get_default()); + object_initialize(&s->dp, sizeof(s->dp), TYPE_XLNX_DP); qdev_set_parent_bus(DEVICE(&s->dp), sysbus_get_default()); @@ -405,6 +411,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) g_free(bus_name); } + object_property_set_bool(OBJECT(&s->arm_gen_timer), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->arm_gen_timer), 0, ARM_GEN_TIMER_ADDR); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->arm_gen_timer), 1, ARM_GEN_TIMER_ADDR - 0x10000); + object_property_set_bool(OBJECT(&s->dp), true, "realized", &err); if (err) { error_propagate(errp, err); diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index c2931bf..8deabb4 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -26,6 +26,7 @@ #include "hw/ide/ahci.h" #include "hw/sd/sdhci.h" #include "hw/ssi/xilinx_spips.h" +#include "hw/timer/arm_generic_timer.h" #include "hw/dma/xlnx_dpdma.h" #include "hw/display/xlnx_dp.h" @@ -83,6 +84,7 @@ typedef struct XlnxZynqMPState { SysbusAHCIState sata; SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI]; XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS]; + ARMGenTimer arm_gen_timer; XlnxDPState dp; XlnxDPDMAState dpdma; -- 2.7.4