From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 752CAC433EF for ; Tue, 10 May 2022 12:20:42 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9717E842BF; Tue, 10 May 2022 14:20:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id C318C8429F; Tue, 10 May 2022 14:20:16 +0200 (CEST) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 17610842B4 for ; Tue, 10 May 2022 14:19:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=weijie.gao@mediatek.com X-UUID: 5d506b4f90984f70b505d9247e208721-20220510 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4, REQID:67456d64-08b6-4663-b8e8-8ecc23ce7deb, OB:-327 68,LOB:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:-32768,SF:-32768,FILE:0,RULE:R elease_Ham,ACTION:release,TS:0 X-CID-META: VersionHash:faefae9, CLOUDID:1820e916-2e53-443e-b81a-655c13977218, C OID:nil,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: 5d506b4f90984f70b505d9247e208721-20220510 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 851828823; Tue, 10 May 2022 20:18:56 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 10 May 2022 20:18:55 +0800 Received: from mcddlt001.gcn.mediatek.inc (10.19.240.15) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 10 May 2022 20:18:55 +0800 From: Weijie Gao To: CC: GSS_MTK_Uboot_upstream , Weijie Gao Subject: [PATCH v4 09/25] reset: mtmips: add reset controller support for MediaTek MT7621 SoC Date: Tue, 10 May 2022 20:18:53 +0800 Message-ID: <5bcb790d5a25b85b7b191ac2a7b60c131b9c045b.1652183768.git.weijie.gao@mediatek.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean This patch adds reset controller bits definition header file for MediaTek MT7621 SoC Signed-off-by: Weijie Gao --- v4 changes: none v3 changes: none v2 changes: none --- include/dt-bindings/reset/mt7621-reset.h | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 include/dt-bindings/reset/mt7621-reset.h diff --git a/include/dt-bindings/reset/mt7621-reset.h b/include/dt-bindings/reset/mt7621-reset.h new file mode 100644 index 0000000000..8e4341f040 --- /dev/null +++ b/include/dt-bindings/reset/mt7621-reset.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 MediaTek Inc. All rights reserved. + * + * Author: Weijie Gao + */ + +#ifndef _DT_BINDINGS_MT7621_RESET_H_ +#define _DT_BINDINGS_MT7621_RESET_H_ + +#define RST_PPE 31 +#define RST_SDXC 30 +#define RST_CRYPTO 29 +#define RST_AUX_STCK 28 +#define RST_PCIE2 26 +#define RST_PCIE1 25 +#define RST_PCIE0 24 +#define RST_GMAC 23 +#define RST_UART3 21 +#define RST_UART2 20 +#define RST_UART1 19 +#define RST_SPI 18 +#define RST_I2S 17 +#define RST_I2C 16 +#define RST_NFI 15 +#define RST_GDMA 14 +#define RST_PIO 13 +#define RST_PCM 11 +#define RST_MC 10 +#define RST_INTC 9 +#define RST_TIMER 8 +#define RST_SPDIFTX 7 +#define RST_FE 6 +#define RST_HSDMA 5 +#define RST_MCM 2 +#define RST_SYS 0 + +#endif /* _DT_BINDINGS_MT7621_RESET_H_ */ -- 2.17.1