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Fri, 10 Jul 2020 12:48:26 +0000 Subject: Re: [PATCH 02/25] dma-fence: prime lockdep annotations To: Jason Gunthorpe , Daniel Vetter Cc: DRI Development , Intel Graphics Development , linux-rdma@vger.kernel.org, Daniel Vetter , Felix Kuehling , kernel test robot , =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= , Mika Kuoppala , linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, amd-gfx@lists.freedesktop.org, Chris Wilson , Maarten Lankhorst , Daniel Vetter References: <20200707201229.472834-1-daniel.vetter@ffwll.ch> <20200707201229.472834-3-daniel.vetter@ffwll.ch> <20200709080911.GP3278063@phenom.ffwll.local> <20200710124357.GB23821@mellanox.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <5c163d74-4a28-1d74-be86-099b4729a2e0@amd.com> Date: Fri, 10 Jul 2020 14:48:16 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 In-Reply-To: <20200710124357.GB23821@mellanox.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-ClientProxiedBy: AM4PR0101CA0055.eurprd01.prod.exchangelabs.com (2603:10a6:200:41::23) To MN2PR12MB3775.namprd12.prod.outlook.com (2603:10b6:208:159::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [IPv6:2a02:908:1252:fb60:be8a:bd56:1f94:86e7] (2a02:908:1252:fb60:be8a:bd56:1f94:86e7) by AM4PR0101CA0055.eurprd01.prod.exchangelabs.com (2603:10a6:200:41::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.20 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: 1PLgswyH2pJ2LHY/OAygHHMiMjadCG1fpyo3aU5a1kr/w6SIpftzu2Ej3pIfckLuCqMtLUb+aUiZiw06ALFKdIIn0vSFoDKo8Ya9fXmM+ulAcTD/2OP6Oap7/Gbi3rdm1CT0rnTVpUDj9FRenNwf0K93HQ1coztV2Bd7kNMJrrskhOTzY+1yuaOVuNwhVJiU2JHqPPq2UiR5ij/SRIw/Q9pYibTv1aze18IHjgyOLkaTHdPsy+yxy8iSdxVt2K6JooX8h7pM5Xg7WO9Zrfsj0ACj5DwzoYH7N06lhCMaxF7WWo7mRe5WAVpP41279uBXRBtkxCPyaOwqTMaOd9zBMFTZkSEWIM0ggRLnulzazEpmo4d+hdtcJ7OP07rryYDtm5MP/BSaDYytouw6A+wlBj9RsbY4+rIfi6O8sG77n4X9GbgJiTPHX+MbL56Gvv+S4YcEdJUxQWjgs9BJ51doC8RRAWUcbCDlB65zNOQyeTqFgj+UwmomTvE9ca6gmiDWo8+p0ptJJNzYgwwovoqzHOx7nphhMXs4Jr1hfW31TQi3MOxaFMJX91aIw996CxBX X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8a56712a-98a8-4fa3-261e-08d824cf89b7 X-MS-Exchange-CrossTenant-AuthSource: MN2PR12MB3775.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Jul 2020 12:48:26.4724 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ytZHHd+DaFbvU50GSN8wPdq/wMh8tp45OOBW9aBG7DvfkbGa5T2gnfrJgAc89npI X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3789 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org Am 10.07.20 um 14:43 schrieb Jason Gunthorpe: > On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter wrote: >> Hi Jason, >> >> Below the paragraph I've added after our discussions around dma-fences >> outside of drivers/gpu. Good enough for an ack on this, or want something >> changed? >> >> Thanks, Daniel >> >>> + * Note that only GPU drivers have a reasonable excuse for both requiring >>> + * &mmu_interval_notifier and &shrinker callbacks at the same time as having to >>> + * track asynchronous compute work using &dma_fence. No driver outside of >>> + * drivers/gpu should ever call dma_fence_wait() in such contexts. > I was hoping we'd get to 'no driver outside GPU should even use > dma_fence()' My last status was that V4L could come use dma_fences as well. I'm not 100% sure, but wouldn't MMU notifier + dma_fence be a valid use case for things like custom FPGA interfaces as well? > Is that not reasonable? > > When your annotations once anything uses dma_fence it has to assume > the worst cases, right? Well a defensive approach is usually the best idea, yes. Christian. > > Jason From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92CF9C433DF for ; Fri, 10 Jul 2020 12:48:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 41DF62077D for ; Fri, 10 Jul 2020 12:48:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=amdcloud.onmicrosoft.com header.i=@amdcloud.onmicrosoft.com header.b="bIqUod6o" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 41DF62077D Authentication-Results: mail.kernel.org; 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dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=amd.com; Received: from MN2PR12MB3775.namprd12.prod.outlook.com (2603:10b6:208:159::19) by MN2PR12MB3789.namprd12.prod.outlook.com (2603:10b6:208:16a::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.21; Fri, 10 Jul 2020 12:48:26 +0000 Received: from MN2PR12MB3775.namprd12.prod.outlook.com ([fe80::a16e:8812:b4c0:918d]) by MN2PR12MB3775.namprd12.prod.outlook.com ([fe80::a16e:8812:b4c0:918d%6]) with mapi id 15.20.3174.023; Fri, 10 Jul 2020 12:48:26 +0000 Subject: Re: [PATCH 02/25] dma-fence: prime lockdep annotations To: Jason Gunthorpe , Daniel Vetter References: <20200707201229.472834-1-daniel.vetter@ffwll.ch> <20200707201229.472834-3-daniel.vetter@ffwll.ch> <20200709080911.GP3278063@phenom.ffwll.local> <20200710124357.GB23821@mellanox.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <5c163d74-4a28-1d74-be86-099b4729a2e0@amd.com> Date: Fri, 10 Jul 2020 14:48:16 +0200 User-Agent: Mozilla/5.0 (X11; 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charset="us-ascii"; Format="flowed" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Am 10.07.20 um 14:43 schrieb Jason Gunthorpe: > On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter wrote: >> Hi Jason, >> >> Below the paragraph I've added after our discussions around dma-fences >> outside of drivers/gpu. Good enough for an ack on this, or want something >> changed? >> >> Thanks, Daniel >> >>> + * Note that only GPU drivers have a reasonable excuse for both requiring >>> + * &mmu_interval_notifier and &shrinker callbacks at the same time as having to >>> + * track asynchronous compute work using &dma_fence. No driver outside of >>> + * drivers/gpu should ever call dma_fence_wait() in such contexts. > I was hoping we'd get to 'no driver outside GPU should even use > dma_fence()' My last status was that V4L could come use dma_fences as well. I'm not 100% sure, but wouldn't MMU notifier + dma_fence be a valid use case for things like custom FPGA interfaces as well? > Is that not reasonable? > > When your annotations once anything uses dma_fence it has to assume > the worst cases, right? Well a defensive approach is usually the best idea, yes. Christian. > > Jason _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19B84C433E5 for ; Fri, 10 Jul 2020 12:48:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E2F052078D for ; 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dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=amd.com; Received: from MN2PR12MB3775.namprd12.prod.outlook.com (2603:10b6:208:159::19) by MN2PR12MB3789.namprd12.prod.outlook.com (2603:10b6:208:16a::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.21; Fri, 10 Jul 2020 12:48:26 +0000 Received: from MN2PR12MB3775.namprd12.prod.outlook.com ([fe80::a16e:8812:b4c0:918d]) by MN2PR12MB3775.namprd12.prod.outlook.com ([fe80::a16e:8812:b4c0:918d%6]) with mapi id 15.20.3174.023; Fri, 10 Jul 2020 12:48:26 +0000 To: Jason Gunthorpe , Daniel Vetter References: <20200707201229.472834-1-daniel.vetter@ffwll.ch> <20200707201229.472834-3-daniel.vetter@ffwll.ch> <20200709080911.GP3278063@phenom.ffwll.local> <20200710124357.GB23821@mellanox.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <5c163d74-4a28-1d74-be86-099b4729a2e0@amd.com> Date: Fri, 10 Jul 2020 14:48:16 +0200 User-Agent: Mozilla/5.0 (X11; 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charset="us-ascii"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Am 10.07.20 um 14:43 schrieb Jason Gunthorpe: > On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter wrote: >> Hi Jason, >> >> Below the paragraph I've added after our discussions around dma-fences >> outside of drivers/gpu. Good enough for an ack on this, or want something >> changed? >> >> Thanks, Daniel >> >>> + * Note that only GPU drivers have a reasonable excuse for both requiring >>> + * &mmu_interval_notifier and &shrinker callbacks at the same time as having to >>> + * track asynchronous compute work using &dma_fence. No driver outside of >>> + * drivers/gpu should ever call dma_fence_wait() in such contexts. > I was hoping we'd get to 'no driver outside GPU should even use > dma_fence()' My last status was that V4L could come use dma_fences as well. I'm not 100% sure, but wouldn't MMU notifier + dma_fence be a valid use case for things like custom FPGA interfaces as well? > Is that not reasonable? > > When your annotations once anything uses dma_fence it has to assume > the worst cases, right? Well a defensive approach is usually the best idea, yes. Christian. > > Jason _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF557C433E2 for ; Fri, 10 Jul 2020 12:48:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C45642082E for ; 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charset="us-ascii"; Format="flowed" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 10.07.20 um 14:43 schrieb Jason Gunthorpe: > On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter wrote: >> Hi Jason, >> >> Below the paragraph I've added after our discussions around dma-fences >> outside of drivers/gpu. Good enough for an ack on this, or want something >> changed? >> >> Thanks, Daniel >> >>> + * Note that only GPU drivers have a reasonable excuse for both requiring >>> + * &mmu_interval_notifier and &shrinker callbacks at the same time as having to >>> + * track asynchronous compute work using &dma_fence. No driver outside of >>> + * drivers/gpu should ever call dma_fence_wait() in such contexts. > I was hoping we'd get to 'no driver outside GPU should even use > dma_fence()' My last status was that V4L could come use dma_fences as well. I'm not 100% sure, but wouldn't MMU notifier + dma_fence be a valid use case for things like custom FPGA interfaces as well? > Is that not reasonable? > > When your annotations once anything uses dma_fence it has to assume > the worst cases, right? Well a defensive approach is usually the best idea, yes. Christian. > > Jason _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx