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Tue, 9 Nov 2021 20:19:51 +0000 Message-ID: <5c7b65b6-69ed-2259-0edd-cf04cffa9231@amd.com> Date: Tue, 9 Nov 2021 15:19:47 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes Content-Language: en-US To: =?UTF-8?B?VmlsbGUgU3lyasOkbMOk?= References: <20210906213904.27918-1-uma.shankar@intel.com> <20210906213904.27918-6-uma.shankar@intel.com> From: Harry Wentland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: YQBPR01CA0030.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c01::38) To CO6PR12MB5427.namprd12.prod.outlook.com (2603:10b6:5:358::13) MIME-Version: 1.0 Received: from [192.168.50.4] (198.200.67.104) by YQBPR01CA0030.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c01::38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.11 via Frontend Transport; Tue, 9 Nov 2021 20:19:50 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2c87c688-4279-4efe-d125-08d9a3be48ec X-MS-TrafficTypeDiagnostic: CO6PR12MB5410: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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HDR and SDR >>> planes have different capabilities, implemented respective >>> structure for the HDR planes. >>> >>> Signed-off-by: Uma Shankar >>> --- >>> drivers/gpu/drm/i915/display/intel_color.c | 52 ++++++++++++++++++++++ >>> 1 file changed, 52 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c >>> index afcb4bf3826c..6403bd74324b 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_color.c >>> +++ b/drivers/gpu/drm/i915/display/intel_color.c >>> @@ -2092,6 +2092,58 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state) >>> } >>> } >>> >>> + /* FIXME input bpc? */ >>> +__maybe_unused >>> +static const struct drm_color_lut_range d13_degamma_hdr[] = { >>> + /* segment 1 */ >>> + { >>> + .flags = (DRM_MODE_LUT_GAMMA | >>> + DRM_MODE_LUT_REFLECT_NEGATIVE | >>> + DRM_MODE_LUT_INTERPOLATE | >>> + DRM_MODE_LUT_NON_DECREASING), >>> + .count = 128, >> >> Is the distribution of the 128 entries uniform? > > I guess this is the plane gamma thing despite being in intel_color.c, > so yeah I think that's correct. > >> If so, is a >> uniform distribution of 128 points across most of the LUT >> good enough for HDR with 128 entries? > > No idea how good this actually is. It is .24 so at least > it does have a fair bit of precision. > Precision is good but you also need enough samples. Though that's probably less my concern and more your concern and should become apparent once its used. >> >>> + .input_bpc = 24, .output_bpc = 16, >>> + .start = 0, .end = (1 << 24) - 1, >>> + .min = 0, .max = (1 << 24) - 1, >>> + }, >>> + /* segment 2 */ >>> + { >>> + .flags = (DRM_MODE_LUT_GAMMA | >>> + DRM_MODE_LUT_REFLECT_NEGATIVE | >>> + DRM_MODE_LUT_INTERPOLATE | >>> + DRM_MODE_LUT_REUSE_LAST | >>> + DRM_MODE_LUT_NON_DECREASING), >>> + .count = 1, >>> + .input_bpc = 24, .output_bpc = 16, >>> + .start = (1 << 24) - 1, .end = 1 << 24, >> >> .start and .end are only a single entry apart. Is this correct? > > One think I wanted to do is simplify this stuff by getting rid of > .end entirely. So I think this should just be '.start=1<<24' (or > whatever way we decide to specify the input precision, which is > I think another slightly open question). > > So for this thing we could just have: > { .count = 128, .min = 0, .max = (1 << 24) - 1, .start = 0 }, > { .count = 1, .min = 0, .max = (7 << 24) - 1, .start = 1 << 24 }, > { .count = 1, .min = 0, .max = (7 << 24) - 1, .start = 3 << 24 }, > { .count = 1, .min = 0, .max = (7 << 24) - 1, .start = 7 << 24 }, > > + flags/etc. which I left out for brevity. > Makes sense. I like this. > So that is trying to indicate that the first 129 entries are equally > spaced, and would be used to interpolate for input values [0.0,1.0). > Input values [1.0,3.0) would interpolate between entry 128 and 129, > and [3.0,7.0) would interpolate between entry 129 and 130. > What in the segment definition defines the 1.0 mark? In your example it seems to be at (1 << 24) but then we would have values that go beyond the input_bpc for the last three segments. How about output_bpc? Would output_bpc somehow limit the U32.32 (or S31.32) entries, and if so, how? Or should we treat input_/output_bpc only as capability reporting, so userspace can calculate the possible error when programming the LUT? Again, this leaves us with the question what the input_/output_bpc means for our PWL entries. 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Tue, 9 Nov 2021 20:19:51 +0000 Message-ID: <5c7b65b6-69ed-2259-0edd-cf04cffa9231@amd.com> Date: Tue, 9 Nov 2021 15:19:47 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Content-Language: en-US To: =?UTF-8?B?VmlsbGUgU3lyasOkbMOk?= References: <20210906213904.27918-1-uma.shankar@intel.com> <20210906213904.27918-6-uma.shankar@intel.com> From: Harry Wentland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: YQBPR01CA0030.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c01::38) To CO6PR12MB5427.namprd12.prod.outlook.com (2603:10b6:5:358::13) MIME-Version: 1.0 Received: from [192.168.50.4] (198.200.67.104) by YQBPR01CA0030.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c01::38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.11 via Frontend Transport; Tue, 9 Nov 2021 20:19:50 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2c87c688-4279-4efe-d125-08d9a3be48ec X-MS-TrafficTypeDiagnostic: CO6PR12MB5410: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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HDR and SDR >>> planes have different capabilities, implemented respective >>> structure for the HDR planes. >>> >>> Signed-off-by: Uma Shankar >>> --- >>> drivers/gpu/drm/i915/display/intel_color.c | 52 ++++++++++++++++++++++ >>> 1 file changed, 52 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c >>> index afcb4bf3826c..6403bd74324b 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_color.c >>> +++ b/drivers/gpu/drm/i915/display/intel_color.c >>> @@ -2092,6 +2092,58 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state) >>> } >>> } >>> >>> + /* FIXME input bpc? */ >>> +__maybe_unused >>> +static const struct drm_color_lut_range d13_degamma_hdr[] = { >>> + /* segment 1 */ >>> + { >>> + .flags = (DRM_MODE_LUT_GAMMA | >>> + DRM_MODE_LUT_REFLECT_NEGATIVE | >>> + DRM_MODE_LUT_INTERPOLATE | >>> + DRM_MODE_LUT_NON_DECREASING), >>> + .count = 128, >> >> Is the distribution of the 128 entries uniform? > > I guess this is the plane gamma thing despite being in intel_color.c, > so yeah I think that's correct. > >> If so, is a >> uniform distribution of 128 points across most of the LUT >> good enough for HDR with 128 entries? > > No idea how good this actually is. It is .24 so at least > it does have a fair bit of precision. > Precision is good but you also need enough samples. Though that's probably less my concern and more your concern and should become apparent once its used. >> >>> + .input_bpc = 24, .output_bpc = 16, >>> + .start = 0, .end = (1 << 24) - 1, >>> + .min = 0, .max = (1 << 24) - 1, >>> + }, >>> + /* segment 2 */ >>> + { >>> + .flags = (DRM_MODE_LUT_GAMMA | >>> + DRM_MODE_LUT_REFLECT_NEGATIVE | >>> + DRM_MODE_LUT_INTERPOLATE | >>> + DRM_MODE_LUT_REUSE_LAST | >>> + DRM_MODE_LUT_NON_DECREASING), >>> + .count = 1, >>> + .input_bpc = 24, .output_bpc = 16, >>> + .start = (1 << 24) - 1, .end = 1 << 24, >> >> .start and .end are only a single entry apart. Is this correct? > > One think I wanted to do is simplify this stuff by getting rid of > .end entirely. So I think this should just be '.start=1<<24' (or > whatever way we decide to specify the input precision, which is > I think another slightly open question). > > So for this thing we could just have: > { .count = 128, .min = 0, .max = (1 << 24) - 1, .start = 0 }, > { .count = 1, .min = 0, .max = (7 << 24) - 1, .start = 1 << 24 }, > { .count = 1, .min = 0, .max = (7 << 24) - 1, .start = 3 << 24 }, > { .count = 1, .min = 0, .max = (7 << 24) - 1, .start = 7 << 24 }, > > + flags/etc. which I left out for brevity. > Makes sense. I like this. > So that is trying to indicate that the first 129 entries are equally > spaced, and would be used to interpolate for input values [0.0,1.0). > Input values [1.0,3.0) would interpolate between entry 128 and 129, > and [3.0,7.0) would interpolate between entry 129 and 130. > What in the segment definition defines the 1.0 mark? In your example it seems to be at (1 << 24) but then we would have values that go beyond the input_bpc for the last three segments. How about output_bpc? Would output_bpc somehow limit the U32.32 (or S31.32) entries, and if so, how? Or should we treat input_/output_bpc only as capability reporting, so userspace can calculate the possible error when programming the LUT? Again, this leaves us with the question what the input_/output_bpc means for our PWL entries. Harry