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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>,
	Chris Wilson <chris.p.wilson@intel.com>,
	igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH i-g-t 3/3] test/perf: Pass context id for gen12 mi rpc test
Date: Mon, 18 Nov 2019 15:24:49 +0200	[thread overview]
Message-ID: <5cbda5e6-53a0-5951-8070-ee75e123eb7b@intel.com> (raw)
In-Reply-To: <20191111221655.33172-3-umesh.nerlige.ramappa@intel.com>

On 12/11/2019 00:16, Umesh Nerlige Ramappa wrote:
> On Gen12, MI RPC uses OAR. OAR is configured only for the render context
> that wants to measure the performance. Hence a context must be passed to
> perf in the gen12 MI RPC when compared to previous gens.
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>   tests/perf.c | 109 ++++++++++++++++++++++++++++++++++++++++++++++++++-
>   1 file changed, 108 insertions(+), 1 deletion(-)
>
> diff --git a/tests/perf.c b/tests/perf.c
> index b439e5bd..b6bc1428 100644
> --- a/tests/perf.c
> +++ b/tests/perf.c
> @@ -2816,6 +2816,106 @@ test_disabled_read_error(void)
>   	__perf_close(stream_fd);
>   }
>   
> +static void
> +gen12_test_mi_rpc(void)
> +{
> +	uint64_t properties[] = {
> +		/* On Gen12, MI RPC uses OAR. OAR is configured only for the
> +		 * render context that wants to measure the performance. Hence a
> +		 * context must be specified in the gen12 MI RPC when compared
> +		 * to previous gens.
> +		 *
> +		 * Have a random value here for the context id, but initialize
> +		 * it once you figure out the context ID for the work to be
> +		 * measured
> +		 */
> +		DRM_I915_PERF_PROP_CTX_HANDLE, UINT64_MAX,
> +
> +		/* OA unit configuration:
> +		 * DRM_I915_PERF_PROP_SAMPLE_OA is no longer required for Gen12
> +		 * because the OAR unit increments counters only for the
> +		 * relevant context. No other parameters are needed since we do
> +		 * not rely on the OA buffer anymore to normalize the counter
> +		 * values.
> +		 */
> +		DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
> +		DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
> +	};
> +	struct drm_i915_perf_open_param param = {
> +		.flags = I915_PERF_FLAG_FD_CLOEXEC,
> +		.num_properties = ARRAY_SIZE(properties) / 2,
> +		.properties_ptr = to_user_pointer(properties),
> +	};
> +	drm_intel_bo *bo;
> +	drm_intel_bufmgr *bufmgr;
> +	drm_intel_context *context;
> +	struct intel_batchbuffer *batch;
> +#define INVALID_CTX_ID 0xffffffff
> +	uint32_t ctx_id = INVALID_CTX_ID;
> +	uint32_t *report32;
> +	int ret;
> +	size_t format_size_32;
> +
> +	/* Ensure perf_stream_paranoid is set to 1 by default */
> +	write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
> +
> +	bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
> +	igt_assert(bufmgr);
> +
> +	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
> +
> +	context = drm_intel_gem_context_create(bufmgr);
> +	igt_assert(context);
> +
> +	ret = drm_intel_gem_context_get_id(context, &ctx_id);
> +	igt_assert_eq(ret, 0);
> +	igt_assert_neq(ctx_id, INVALID_CTX_ID);
> +	properties[1] = ctx_id;
> +
> +	batch = intel_batchbuffer_alloc(bufmgr, devid);
> +	bo = drm_intel_bo_alloc(bufmgr, "mi_rpc dest bo", 4096, 64);
> +
> +	ret = drm_intel_bo_map(bo, true);
> +	igt_assert_eq(ret, 0);
> +	memset(bo->virtual, 0x80, 4096);
> +	drm_intel_bo_unmap(bo);
> +
> +	stream_fd = __perf_open(drm_fd, &param, false);
> +
> +#define REPORT_ID 0xdeadbeef
> +#define REPORT_OFFSET 0
> +	emit_report_perf_count(batch,
> +			       bo,
> +			       REPORT_OFFSET,
> +			       REPORT_ID);
> +	intel_batchbuffer_flush_with_context(batch, context);
> +
> +	ret = drm_intel_bo_map(bo, false);
> +	igt_assert_eq(ret, 0);
> +
> +	report32 = bo->virtual;
> +	format_size_32 = get_oa_format(test_oa_format).size >> 2;
> +	dump_report(report32, format_size_32, "mi-rpc");
> +
> +	/* Sanity check reports
> +	 * reportX_32[0]: report id passed with mi-rpc
> +	 * reportX_32[1]: timestamp
> +	 * reportX_32[format_size_32 - 1]: end of report
> +	 * reportX_32[format_size_32]: outside report
> +	 */
> +	igt_assert_eq(report32[0], REPORT_ID);
> +	igt_assert_neq(report32[1], 0);


In theory you can get very unlucky and get a timestamp value of 0 once 
every ~6minutes.


> +	igt_assert_neq(report32[format_size_32 - 1], 0x80808080);


Again I don't know what the Test config is supposed to generate on the 
last counter.

I would pick Counter B0, it's defined as 0.


> +	igt_assert_eq(report32[format_size_32], 0x80808080);
> +
> +	drm_intel_bo_unmap(bo);
> +	drm_intel_bo_unreference(bo);
> +	intel_batchbuffer_free(batch);
> +	drm_intel_gem_context_destroy(context);
> +	drm_intel_bufmgr_destroy(bufmgr);
> +	__perf_close(stream_fd);
> +}
> +
>   static void
>   test_mi_rpc(void)
>   {
> @@ -4533,8 +4633,15 @@ igt_main
>   	igt_subtest("short-reads")
>   		test_short_reads();
>   
> -	igt_subtest("mi-rpc")
> +	igt_subtest("mi-rpc") {
> +		igt_require(intel_gen(devid) < 12);
>   		test_mi_rpc();
> +	}
> +
> +	igt_subtest("gen12-mi-rpc") {
> +		igt_require(intel_gen(devid) >= 12);
> +		gen12_test_mi_rpc();
> +	}
>   
>   	igt_subtest("unprivileged-single-ctx-counters") {
>   		igt_require(IS_HASWELL(devid));


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  reply	other threads:[~2019-11-18 13:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-11 22:16 [igt-dev] [PATCH i-g-t 1/3] test/perf: Add support for TGL in perf tests Umesh Nerlige Ramappa
2019-11-11 22:16 ` [igt-dev] [PATCH i-g-t 2/3] test/perf: Add test for TGL OAR unit Umesh Nerlige Ramappa
2019-11-18 13:15   ` Lionel Landwerlin
2019-11-11 22:16 ` [igt-dev] [PATCH i-g-t 3/3] test/perf: Pass context id for gen12 mi rpc test Umesh Nerlige Ramappa
2019-11-18 13:24   ` Lionel Landwerlin [this message]
2019-11-18 18:13     ` Umesh Nerlige Ramappa
2019-11-11 22:49 ` [igt-dev] ✗ GitLab.Pipeline: failure for series starting with [i-g-t,1/3] test/perf: Add support for TGL in perf tests Patchwork
2019-11-11 22:58 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2019-11-12 10:59 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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