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Server (TLS) id 15.0.1497.2; Thu, 2 Sep 2021 14:05:36 +0800 Received: from mhfsdcap04 (10.17.3.154) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 2 Sep 2021 14:05:35 +0800 Message-ID: <5d53649c1fe2d6d6942e1dd31cdf7a0def46acab.camel@mediatek.com> Subject: Re: [PATCH v6, 15/15] media: mtk-vcodec: Use codec type to separate different hardware From: "yunfei.dong@mediatek.com" To: Dafna Hirschfeld , Alexandre Courbot , Hans Verkuil , "Tzung-Bi Shih" , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa , Laurent Pinchart CC: Daniel Vetter , dri-devel , Hsin-Yi Wang , Fritz Koenig , Irui Wang , , , , , , , Date: Thu, 2 Sep 2021 14:05:36 +0800 In-Reply-To: References: <20210901083215.25984-1-yunfei.dong@mediatek.com> <20210901083215.25984-16-yunfei.dong@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org T24gV2VkLCAyMDIxLTA5LTAxIGF0IDE0OjE3ICswMjAwLCBEYWZuYSBIaXJzY2hmZWxkIHdyb3Rl Og0KSGkgRGFmbmEsDQoNClRoYW5rcyBmb3IgeW91ciBzdWdnZXN0aW9uLg0KPiBIaQ0KPiANCj4g T24gMDEuMDkuMjEgMTA6MzIsIFl1bmZlaSBEb25nIHdyb3RlOg0KPiA+IFRoZXJlIGFyZSBqdXN0 IG9uZSBjb3JlIHRocmVhZCwgaW4gb3JkZXIgdG8gc2VwYXJlYXRlIGRpZmZlcmVudA0KPiA+IGhh cmR3YXJlLCB1c2luZyBjb2RlYyB0eXBlIHRvIHNlcGFyZWF0ZSBpdCBpbiBzY3AgZHJpdmVyLg0K PiANCj4gdGhpcyBjb2RlIHNlZW1zIHRvIHJlbGF0ZSB0byB0aGUgdnB1IGRyaXZlciBub3QgdGhl IHNjcCBkcml2ZXIuDQo+IElzIHRoZXJlIGEgY29ycmVzcG9uZGluZyBjb2RlIGFkZGVkIHRvIHRo ZSB2cHUgZHJpdmVyIHRoYXQgdGVzdCB0aGUNCj4gY29kZWNfdHlwZT8NCj4gDQpWcHUgaXMgdmlk ZW8gcHJvY2Vzc29yIHVuaXQsIHVzZWQgdG8gY29ubmVjdCB3aXRoIG1pY3JvIHByb2Nlc3Nvci4N CkluIG10ODE3MzogdmRlY192cHVfaWYuYyAtPiBtdGtfdnB1LmMgLT4gbWljcm8gcHJvY2Vzc29y DQpJbiBtdDgxOTIvbXQ4MTgzOiB2ZGVjX3ZwdV9pZi5jIC0+IG10a19zY3AuYyAtPm1pY3JvIHBy b2Nlc3Nvcg0KDQpUaGlzIGluaXQvZGVjIHN0YXJ0L2RlY19lbmQgaW50ZXJmYWNlcyBhcmUgdGhl IHNhbWUgZm9yIHZwdSBhbmQgc2NwLg0KPiA+IA0KPiA+IFNpZ25lZC1vZmYtYnk6IFl1bmZlaSBE b25nIDx5dW5mZWkuZG9uZ0BtZWRpYXRlay5jb20+DQo+ID4gLS0tDQo+ID4gICAuLi4vbWVkaWEv cGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX2lwaV9tc2cuaCAgfCAxMiArKysrLS0tDQo+ID4gICAu Li4vbWVkaWEvcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX3ZwdV9pZi5jICAgfCAzNA0KPiA+ICsr KysrKysrKysrKysrKystLS0NCj4gPiAgIC4uLi9tZWRpYS9wbGF0Zm9ybS9tdGstdmNvZGVjL3Zk ZWNfdnB1X2lmLmggICB8ICA0ICsrKw0KPiA+ICAgMyBmaWxlcyBjaGFuZ2VkLCA0MSBpbnNlcnRp b25zKCspLCA5IGRlbGV0aW9ucygtKQ0KPiA+IA0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL21l ZGlhL3BsYXRmb3JtL210ay12Y29kZWMvdmRlY19pcGlfbXNnLmgNCj4gPiBiL2RyaXZlcnMvbWVk aWEvcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX2lwaV9tc2cuaA0KPiA+IGluZGV4IDlkODA3OWM0 Zjk3Ni4uYzQ4OGYwYzQwMTkwIDEwMDY0NA0KPiA+IC0tLSBhL2RyaXZlcnMvbWVkaWEvcGxhdGZv cm0vbXRrLXZjb2RlYy92ZGVjX2lwaV9tc2cuaA0KPiA+ICsrKyBiL2RyaXZlcnMvbWVkaWEvcGxh dGZvcm0vbXRrLXZjb2RlYy92ZGVjX2lwaV9tc2cuaA0KPiA+IEBAIC0zNSw2ICszNSw4IEBAIGVu dW0gdmRlY19pcGlfbXNnaWQgew0KPiA+ICAgICogQG1zZ19pZAk6IHZkZWNfaXBpX21zZ2lkDQo+ ID4gICAgKiBAdnB1X2luc3RfYWRkciA6IFZQVSBkZWNvZGVyIGluc3RhbmNlIGFkZHJlc3MuIFVz ZWQgaWYgQUJJDQo+ID4gdmVyc2lvbiA8IDIuDQo+ID4gICAgKiBAaW5zdF9pZCAgICAgOiBpbnN0 YW5jZSBJRC4gVXNlZCBpZiB0aGUgQUJJIHZlcnNpb24gPj0gMi4NCj4gPiArICogQGNvZGVjX3R5 cGUJOiBDb2RlYyBmb3VyY2MNCj4gPiArICogQHJlc2VydmVkCTogcmVzZXJ2ZWQgcGFyYW0NCj4g PiAgICAqLw0KPiA+ICAgc3RydWN0IHZkZWNfYXBfaXBpX2NtZCB7DQo+ID4gICAJdWludDMyX3Qg bXNnX2lkOw0KPiA+IEBAIC00Miw2ICs0NCw4IEBAIHN0cnVjdCB2ZGVjX2FwX2lwaV9jbWQgew0K PiA+ICAgCQl1aW50MzJfdCB2cHVfaW5zdF9hZGRyOw0KPiA+ICAgCQl1aW50MzJfdCBpbnN0X2lk Ow0KPiA+ICAgCX07DQo+ID4gKwl1aW50MzJfdCBjb2RlY190eXBlOw0KPiA+ICsJdWludDMyX3Qg cmVzZXJ2ZWQ7DQo+ID4gICB9Ow0KPiA+ICAgDQo+ID4gICAvKioNCj4gPiBAQCAtNTksMTIgKzYz LDEyIEBAIHN0cnVjdCB2ZGVjX3ZwdV9pcGlfYWNrIHsNCj4gPiAgIC8qKg0KPiA+ICAgICogc3Ry dWN0IHZkZWNfYXBfaXBpX2luaXQgLSBmb3IgQVBfSVBJTVNHX0RFQ19JTklUDQo+ID4gICAgKiBA bXNnX2lkCTogQVBfSVBJTVNHX0RFQ19JTklUDQo+ID4gLSAqIEByZXNlcnZlZAk6IFJlc2VydmVk IGZpZWxkDQo+ID4gKyAqIEBjb2RlY190eXBlCTogQ29kZWMgZm91cmNjDQo+ID4gICAgKiBAYXBf aW5zdF9hZGRyCTogQVAgdmlkZW8gZGVjb2RlciBpbnN0YW5jZSBhZGRyZXNzDQo+ID4gICAgKi8N Cj4gPiAgIHN0cnVjdCB2ZGVjX2FwX2lwaV9pbml0IHsNCj4gPiAgIAl1aW50MzJfdCBtc2dfaWQ7 DQo+ID4gLQl1aW50MzJfdCByZXNlcnZlZDsNCj4gPiArCXVpbnQzMl90IGNvZGVjX3R5cGU7DQo+ ID4gICAJdWludDY0X3QgYXBfaW5zdF9hZGRyOw0KPiA+ICAgfTsNCj4gPiAgIA0KPiA+IEBAIC03 Nyw3ICs4MSw3IEBAIHN0cnVjdCB2ZGVjX2FwX2lwaV9pbml0IHsNCj4gPiAgICAqCUgyNjQgZGVj b2RlciBbMF06YnVmX3N6IFsxXTpuYWxfc3RhcnQNCj4gPiAgICAqCVZQOCBkZWNvZGVyICBbMF06 d2lkdGgvaGVpZ2h0DQo+ID4gICAgKglWUDkgZGVjb2RlciAgWzBdOnByb2ZpbGUsIFsxXVsyXSB3 aWR0aC9oZWlnaHQNCj4gPiAtICogQHJlc2VydmVkCTogUmVzZXJ2ZWQgZmllbGQNCj4gPiArICog QGNvZGVjX3R5cGUJOiBDb2RlYyBmb3VyY2MNCj4gPiAgICAqLw0KPiA+ICAgc3RydWN0IHZkZWNf YXBfaXBpX2RlY19zdGFydCB7DQo+ID4gICAJdWludDMyX3QgbXNnX2lkOw0KPiA+IEBAIC04Niw3 ICs5MCw3IEBAIHN0cnVjdCB2ZGVjX2FwX2lwaV9kZWNfc3RhcnQgew0KPiA+ICAgCQl1aW50MzJf dCBpbnN0X2lkOw0KPiA+ICAgCX07DQo+ID4gICAJdWludDMyX3QgZGF0YVszXTsNCj4gPiAtCXVp bnQzMl90IHJlc2VydmVkOw0KPiA+ICsJdWludDMyX3QgY29kZWNfdHlwZTsNCj4gPiAgIH07DQo+ ID4gICANCj4gPiAgIC8qKg0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL21lZGlhL3BsYXRmb3Jt L210ay12Y29kZWMvdmRlY192cHVfaWYuYw0KPiA+IGIvZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9t dGstdmNvZGVjL3ZkZWNfdnB1X2lmLmMNCj4gPiBpbmRleCBiZmQ4ZTg3ZGNlZmYuLmM4NGZhYzUy ZmUyNiAxMDA2NDQNCj4gPiAtLS0gYS9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL210ay12Y29kZWMv dmRlY192cHVfaWYuYw0KPiA+ICsrKyBiL2RyaXZlcnMvbWVkaWEvcGxhdGZvcm0vbXRrLXZjb2Rl Yy92ZGVjX3ZwdV9pZi5jDQo+ID4gQEAgLTEwMCwxOCArMTAwLDI5IEBAIHN0YXRpYyB2b2lkIHZw dV9kZWNfaXBpX2hhbmRsZXIodm9pZCAqZGF0YSwNCj4gPiB1bnNpZ25lZCBpbnQgbGVuLCB2b2lk ICpwcml2KQ0KPiA+ICAgDQo+ID4gICBzdGF0aWMgaW50IHZjb2RlY192cHVfc2VuZF9tc2coc3Ry dWN0IHZkZWNfdnB1X2luc3QgKnZwdSwgdm9pZA0KPiA+ICptc2csIGludCBsZW4pDQo+ID4gICB7 DQo+ID4gLQlpbnQgZXJyOw0KPiA+ICsJaW50IGVyciwgaWQsIG1zZ2lkOw0KPiA+ICAgDQo+ID4g LQltdGtfdmNvZGVjX2RlYnVnKHZwdSwgImlkPSVYIiwgKih1aW50MzJfdCAqKW1zZyk7DQo+ID4g Kwltc2dpZCA9ICoodWludDMyX3QgKiltc2c7DQo+ID4gKwltdGtfdmNvZGVjX2RlYnVnKHZwdSwg ImlkPSVYIiwgbXNnaWQpOw0KPiA+ICAgDQo+ID4gICAJdnB1LT5mYWlsdXJlID0gMDsNCj4gPiAg IAl2cHUtPnNpZ25hbGVkID0gMDsNCj4gPiAgIA0KPiA+IC0JZXJyID0gbXRrX3Zjb2RlY19md19p cGlfc2VuZCh2cHUtPmN0eC0+ZGV2LT5md19oYW5kbGVyLCB2cHUtDQo+ID4gPmlkLCBtc2csDQo+ ID4gKwlpZiAodnB1LT5jdHgtPmRldi0+dmRlY19wZGF0YS0+aHdfYXJjaCA9PQ0KPiA+IE1US19W REVDX0xBVF9TSU5HTEVfQ09SRSkgew0KPiA+ICsJCWlmIChtc2dpZCA9PSBBUF9JUElNU0dfREVD X0NPUkUgfHwNCj4gPiArCQkJbXNnaWQgPT0gQVBfSVBJTVNHX0RFQ19DT1JFX0VORCkNCj4gPiAr CQkJaWQgPSB2cHUtPmNvcmVfaWQ7DQo+ID4gKwkJZWxzZQ0KPiA+ICsJCQlpZCA9IHZwdS0+aWQ7 DQo+ID4gKwl9IGVsc2Ugew0KPiA+ICsJCWlkID0gdnB1LT5pZDsNCj4gPiArCX0NCj4gPiArDQo+ ID4gKwllcnIgPSBtdGtfdmNvZGVjX2Z3X2lwaV9zZW5kKHZwdS0+Y3R4LT5kZXYtPmZ3X2hhbmRs ZXIsIGlkLA0KPiA+IG1zZywNCj4gPiAgIAkJCQkgICAgIGxlbiwgMjAwMCk7DQo+IA0KPiBzbw0K PiA+ICAgCWlmIChlcnIpIHsNCj4gPiAgIAkJbXRrX3Zjb2RlY19lcnIodnB1LCAic2VuZCBmYWls IHZwdV9pZD0lZCBtc2dfaWQ9JVgNCj4gPiBzdGF0dXM9JWQiLA0KPiA+IC0JCQkgICAgICAgdnB1 LT5pZCwgKih1aW50MzJfdCAqKW1zZywgZXJyKTsNCj4gPiArCQkJICAgICAgIGlkLCBtc2dpZCwg ZXJyKTsNCj4gPiAgIAkJcmV0dXJuIGVycjsNCj4gPiAgIAl9DQo+ID4gICANCj4gPiBAQCAtMTMx LDYgKzE0Miw3IEBAIHN0YXRpYyBpbnQgdmNvZGVjX3NlbmRfYXBfaXBpKHN0cnVjdA0KPiA+IHZk ZWNfdnB1X2luc3QgKnZwdSwgdW5zaWduZWQgaW50IG1zZ19pZCkNCj4gPiAgIAkJbXNnLnZwdV9p bnN0X2FkZHIgPSB2cHUtPmluc3RfYWRkcjsNCj4gPiAgIAllbHNlDQo+ID4gICAJCW1zZy5pbnN0 X2lkID0gdnB1LT5pbnN0X2lkOw0KPiA+ICsJbXNnLmNvZGVjX3R5cGUgPSB2cHUtPmNvZGVjX3R5 cGU7DQo+ID4gICANCj4gPiAgIAllcnIgPSB2Y29kZWNfdnB1X3NlbmRfbXNnKHZwdSwgJm1zZywg c2l6ZW9mKG1zZykpOw0KPiA+ICAgCW10a192Y29kZWNfZGVidWcodnB1LCAiLSBpZD0lWCByZXQ9 JWQiLCBtc2dfaWQsIGVycik7DQo+ID4gQEAgLTE0OSwxNCArMTYxLDI1IEBAIGludCB2cHVfZGVj X2luaXQoc3RydWN0IHZkZWNfdnB1X2luc3QgKnZwdSkNCj4gPiAgIA0KPiA+ICAgCWVyciA9IG10 a192Y29kZWNfZndfaXBpX3JlZ2lzdGVyKHZwdS0+Y3R4LT5kZXYtPmZ3X2hhbmRsZXIsDQo+ID4g dnB1LT5pZCwNCj4gPiAgIAkJCQkJIHZwdS0+aGFuZGxlciwgInZkZWMiLCBOVUxMKTsNCj4gPiAt CWlmIChlcnIgIT0gMCkgew0KPiA+ICsJaWYgKGVycikgew0KPiANCj4gY291bGQgYmUgbmljZSB0 byBzZW5kIGEgcGF0Y2ggd2l0aCBvdGhlciBzdWNoIGZpeGVzLA0KPiBhbnl3YXkgaXQgaXMgYmV0 dGVyIHRvIHNlbmQgdW5yZWxhdGVkIGZpeGVzIGluIGEgc2VwYXJhdGUgcGF0Y2gNCj4gDQp3aWxs IGZpeCBpbiBuZXh0IHBhdGNoLg0KPiA+ICAgCQltdGtfdmNvZGVjX2Vycih2cHUsICJ2cHVfaXBp X3JlZ2lzdGVyIGZhaWwgc3RhdHVzPSVkIiwNCj4gPiBlcnIpOw0KPiA+ICAgCQlyZXR1cm4gZXJy Ow0KPiA+ICAgCX0NCj4gPiAgIA0KPiA+ICsJaWYgKHZwdS0+Y3R4LT5kZXYtPnZkZWNfcGRhdGEt Pmh3X2FyY2ggPT0NCj4gPiBNVEtfVkRFQ19MQVRfU0lOR0xFX0NPUkUpIHsNCj4gPiArCQllcnIg PSBtdGtfdmNvZGVjX2Z3X2lwaV9yZWdpc3Rlcih2cHUtPmN0eC0+ZGV2LQ0KPiA+ID5md19oYW5k bGVyLA0KPiA+ICsJCQkJCSB2cHUtPmNvcmVfaWQsIHZwdS0+aGFuZGxlciwNCj4gPiArCQkJCQkg InZkZWMiLCBOVUxMKTsNCj4gPiArCQlpZiAoZXJyKSB7DQo+ID4gKwkJCW10a192Y29kZWNfZXJy KHZwdSwgInZwdV9pcGlfcmVnaXN0ZXIgY29yZSBmYWlsDQo+ID4gc3RhdHVzPSVkIiwgZXJyKTsN Cj4gPiArCQkJcmV0dXJuIGVycjsNCj4gPiArCQl9DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICAgCW1l bXNldCgmbXNnLCAwLCBzaXplb2YobXNnKSk7DQo+ID4gICAJbXNnLm1zZ19pZCA9IEFQX0lQSU1T R19ERUNfSU5JVDsNCj4gPiAgIAltc2cuYXBfaW5zdF9hZGRyID0gKHVuc2lnbmVkIGxvbmcpdnB1 Ow0KPiA+ICsJbXNnLmNvZGVjX3R5cGUgPSB2cHUtPmNvZGVjX3R5cGU7DQo+ID4gICANCj4gPiAg IAltdGtfdmNvZGVjX2RlYnVnKHZwdSwgInZkZWNfaW5zdD0lcCIsIHZwdSk7DQo+ID4gICANCj4g PiBAQCAtMTg3LDYgKzIxMCw3IEBAIGludCB2cHVfZGVjX3N0YXJ0KHN0cnVjdCB2ZGVjX3ZwdV9p bnN0ICp2cHUsDQo+ID4gdWludDMyX3QgKmRhdGEsIHVuc2lnbmVkIGludCBsZW4pDQo+ID4gICAN Cj4gPiAgIAlmb3IgKGkgPSAwOyBpIDwgbGVuOyBpKyspDQo+ID4gICAJCW1zZy5kYXRhW2ldID0g ZGF0YVtpXTsNCj4gPiArCW1zZy5jb2RlY190eXBlID0gdnB1LT5jb2RlY190eXBlOw0KPiANCj4g SSBkb24ndCBzZWUgd2hlcmUgaXMgdGhlIHZwdS0+Y29kZWNfdHlwZSBpbml0aWFsemllZA0KPiAN ClRoaXMgcGF0Y2gganVzdCBhZGQgaW50ZXJmYWNlIHRvIHN1cHBvcnQgY29yZSBoYXJkd2FyZSBk ZWNvZGUsIGluIG5leHQgDQpzZXJpYWwgcGF0Y2hlcyBiYXNlZCBvbiB0aGVzZSB3aWxsIHVzZWQg Y29kZWMgdHlwZSB0byBzZXBhcmF0ZSBhZnRlcg0KdGhlc2UgYmFzZSBwYXRjaGVzIGFyZSBzdGFi bGUuDQo+IFRoYW5rcywNCj4gRGFmbmENCj4gDQpUaGFua3MNCll1bmZlaSBEb25nDQo+ID4gICAN Cj4gPiAgIAllcnIgPSB2Y29kZWNfdnB1X3NlbmRfbXNnKHZwdSwgKHZvaWQgKikmbXNnLCBzaXpl b2YobXNnKSk7DQo+ID4gICAJbXRrX3Zjb2RlY19kZWJ1Zyh2cHUsICItIHJldD0lZCIsIGVycik7 DQo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvbWVkaWEvcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVj X3ZwdV9pZi5oDQo+ID4gYi9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL210ay12Y29kZWMvdmRlY192 cHVfaWYuaA0KPiA+IGluZGV4IGFlMjRiNzVkMTY0OS4uODAyNjYwNzcwYTg3IDEwMDY0NA0KPiA+ IC0tLSBhL2RyaXZlcnMvbWVkaWEvcGxhdGZvcm0vbXRrLXZjb2RlYy92ZGVjX3ZwdV9pZi5oDQo+ ID4gKysrIGIvZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9tdGstdmNvZGVjL3ZkZWNfdnB1X2lmLmgN Cj4gPiBAQCAtMTQsNiArMTQsNyBAQCBzdHJ1Y3QgbXRrX3Zjb2RlY19jdHg7DQo+ID4gICAvKioN Cj4gPiAgICAqIHN0cnVjdCB2ZGVjX3ZwdV9pbnN0IC0gVlBVIGluc3RhbmNlIGZvciB2aWRlbyBj b2RlYw0KPiA+ICAgICogQGlkICAgICAgICAgIDogaXBpIG1zZyBpZCBmb3IgZWFjaCBkZWNvZGVy DQo+ID4gKyAqIEBjb3JlX2lkICAgICA6IGNvcmUgaWQgdXNlZCB0byBzZXBhcmF0ZSBkaWZmZXJl bnQgaGFyZHdhcmUNCj4gPiAgICAqIEB2c2kgICAgICAgICA6IGRyaXZlciBzdHJ1Y3R1cmUgYWxs b2NhdGVkIGJ5IFZQVSBzaWRlIGFuZA0KPiA+IHNoYXJlZCB0byBBUCBzaWRlDQo+ID4gICAgKiAg ICAgICAgICAgICAgICBmb3IgY29udHJvbCBhbmQgaW5mbyBzaGFyZQ0KPiA+ICAgICogQGZhaWx1 cmUgICAgIDogVlBVIGV4ZWN1dGlvbiByZXN1bHQgc3RhdHVzLCAwOiBzdWNjZXNzLA0KPiA+IG90 aGVyczogZmFpbA0KPiA+IEBAIC0yNiw5ICsyNywxMSBAQCBzdHJ1Y3QgbXRrX3Zjb2RlY19jdHg7 DQo+ID4gICAgKiBAZGV2CQk6IHBsYXRmb3JtIGRldmljZSBvZiBWUFUNCj4gPiAgICAqIEB3cSAg ICAgICAgICA6IHdhaXQgcXVldWUgdG8gd2FpdCBWUFUgbWVzc2FnZSBhY2sNCj4gPiAgICAqIEBo YW5kbGVyICAgICA6IGlwaSBoYW5kbGVyIGZvciBlYWNoIGRlY29kZXINCj4gPiArICogQGNvZGVj X3R5cGUgICAgIDogdXNlZCBjb2RlYyB0eXBlIHRvIHNlcGFyYXRlIGRpZmZlcmVudCBjb2RlY3MN Cj4gPiAgICAqLw0KPiA+ICAgc3RydWN0IHZkZWNfdnB1X2luc3Qgew0KPiA+ICAgCWludCBpZDsN Cj4gPiArCWludCBjb3JlX2lkOw0KPiA+ICAgCXZvaWQgKnZzaTsNCj4gPiAgIAlpbnQzMl90IGZh aWx1cmU7DQo+ID4gICAJdWludDMyX3QgaW5zdF9hZGRyOw0KPiA+IEBAIC0zOCw2ICs0MSw3IEBA IHN0cnVjdCB2ZGVjX3ZwdV9pbnN0IHsNCj4gPiAgIAlzdHJ1Y3QgbXRrX3Zjb2RlY19jdHggKmN0 eDsNCj4gPiAgIAl3YWl0X3F1ZXVlX2hlYWRfdCB3cTsNCj4gPiAgIAltdGtfdmNvZGVjX2lwaV9o YW5kbGVyIGhhbmRsZXI7DQo+ID4gKwl1bnNpZ25lZCBpbnQgY29kZWNfdHlwZTsNCj4gPiAgIH07 DQo+ID4gICANCj4gPiAgIC8qKg0KPiA+IA0K From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, 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Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLg0m-008gLy-L6; Thu, 02 Sep 2021 06:15:49 +0000 X-UUID: babf8903410b45e4942c23ea9c649c5d-20210901 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=ohFoOPX6vLU/Myf5x8JimNMqzG0QHLyjg0Qz2uxY5yc=; b=ccOHzbIYnZHg1QcqbmjUluy9+G2TmSa9V5bB/GBOuVaQclqx07AFZJAPwZB8acs9LqLFU/6WQYgMgL/pfu6BiwjjsFBBVdkQpcvXjm8MIMcrysv918NP6gO/T6qXcT7KhOMtnmpkh6ZbtF/9PFNpkRmbLjtULH/46DU4UgV8s3E=; X-UUID: babf8903410b45e4942c23ea9c649c5d-20210901 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1555504542; Wed, 01 Sep 2021 23:15:40 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 1 Sep 2021 23:05:38 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 2 Sep 2021 14:05:36 +0800 Received: from mhfsdcap04 (10.17.3.154) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 2 Sep 2021 14:05:35 +0800 Message-ID: <5d53649c1fe2d6d6942e1dd31cdf7a0def46acab.camel@mediatek.com> Subject: Re: [PATCH v6, 15/15] media: mtk-vcodec: Use codec type to separate different hardware From: "yunfei.dong@mediatek.com" To: Dafna Hirschfeld , Alexandre Courbot , Hans Verkuil , "Tzung-Bi Shih" , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa , Laurent Pinchart CC: Daniel Vetter , dri-devel , Hsin-Yi Wang , "Fritz Koenig" , Irui Wang , , , , , , , Date: Thu, 2 Sep 2021 14:05:36 +0800 In-Reply-To: References: <20210901083215.25984-1-yunfei.dong@mediatek.com> <20210901083215.25984-16-yunfei.dong@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210901_231544_742603_82C9133A X-CRM114-Status: GOOD ( 38.95 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Wed, 2021-09-01 at 14:17 +0200, Dafna Hirschfeld wrote: Hi Dafna, Thanks for your suggestion. > Hi > > On 01.09.21 10:32, Yunfei Dong wrote: > > There are just one core thread, in order to separeate different > > hardware, using codec type to separeate it in scp driver. > > this code seems to relate to the vpu driver not the scp driver. > Is there a corresponding code added to the vpu driver that test the > codec_type? > Vpu is video processor unit, used to connect with micro processor. In mt8173: vdec_vpu_if.c -> mtk_vpu.c -> micro processor In mt8192/mt8183: vdec_vpu_if.c -> mtk_scp.c ->micro processor This init/dec start/dec_end interfaces are the same for vpu and scp. > > > > Signed-off-by: Yunfei Dong > > --- > > .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 12 ++++--- > > .../media/platform/mtk-vcodec/vdec_vpu_if.c | 34 > > ++++++++++++++++--- > > .../media/platform/mtk-vcodec/vdec_vpu_if.h | 4 +++ > > 3 files changed, 41 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > b/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > index 9d8079c4f976..c488f0c40190 100644 > > --- a/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > +++ b/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > @@ -35,6 +35,8 @@ enum vdec_ipi_msgid { > > * @msg_id : vdec_ipi_msgid > > * @vpu_inst_addr : VPU decoder instance address. Used if ABI > > version < 2. > > * @inst_id : instance ID. Used if the ABI version >= 2. > > + * @codec_type : Codec fourcc > > + * @reserved : reserved param > > */ > > struct vdec_ap_ipi_cmd { > > uint32_t msg_id; > > @@ -42,6 +44,8 @@ struct vdec_ap_ipi_cmd { > > uint32_t vpu_inst_addr; > > uint32_t inst_id; > > }; > > + uint32_t codec_type; > > + uint32_t reserved; > > }; > > > > /** > > @@ -59,12 +63,12 @@ struct vdec_vpu_ipi_ack { > > /** > > * struct vdec_ap_ipi_init - for AP_IPIMSG_DEC_INIT > > * @msg_id : AP_IPIMSG_DEC_INIT > > - * @reserved : Reserved field > > + * @codec_type : Codec fourcc > > * @ap_inst_addr : AP video decoder instance address > > */ > > struct vdec_ap_ipi_init { > > uint32_t msg_id; > > - uint32_t reserved; > > + uint32_t codec_type; > > uint64_t ap_inst_addr; > > }; > > > > @@ -77,7 +81,7 @@ struct vdec_ap_ipi_init { > > * H264 decoder [0]:buf_sz [1]:nal_start > > * VP8 decoder [0]:width/height > > * VP9 decoder [0]:profile, [1][2] width/height > > - * @reserved : Reserved field > > + * @codec_type : Codec fourcc > > */ > > struct vdec_ap_ipi_dec_start { > > uint32_t msg_id; > > @@ -86,7 +90,7 @@ struct vdec_ap_ipi_dec_start { > > uint32_t inst_id; > > }; > > uint32_t data[3]; > > - uint32_t reserved; > > + uint32_t codec_type; > > }; > > > > /** > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > index bfd8e87dceff..c84fac52fe26 100644 > > --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > @@ -100,18 +100,29 @@ static void vpu_dec_ipi_handler(void *data, > > unsigned int len, void *priv) > > > > static int vcodec_vpu_send_msg(struct vdec_vpu_inst *vpu, void > > *msg, int len) > > { > > - int err; > > + int err, id, msgid; > > > > - mtk_vcodec_debug(vpu, "id=%X", *(uint32_t *)msg); > > + msgid = *(uint32_t *)msg; > > + mtk_vcodec_debug(vpu, "id=%X", msgid); > > > > vpu->failure = 0; > > vpu->signaled = 0; > > > > - err = mtk_vcodec_fw_ipi_send(vpu->ctx->dev->fw_handler, vpu- > > >id, msg, > > + if (vpu->ctx->dev->vdec_pdata->hw_arch == > > MTK_VDEC_LAT_SINGLE_CORE) { > > + if (msgid == AP_IPIMSG_DEC_CORE || > > + msgid == AP_IPIMSG_DEC_CORE_END) > > + id = vpu->core_id; > > + else > > + id = vpu->id; > > + } else { > > + id = vpu->id; > > + } > > + > > + err = mtk_vcodec_fw_ipi_send(vpu->ctx->dev->fw_handler, id, > > msg, > > len, 2000); > > so > > if (err) { > > mtk_vcodec_err(vpu, "send fail vpu_id=%d msg_id=%X > > status=%d", > > - vpu->id, *(uint32_t *)msg, err); > > + id, msgid, err); > > return err; > > } > > > > @@ -131,6 +142,7 @@ static int vcodec_send_ap_ipi(struct > > vdec_vpu_inst *vpu, unsigned int msg_id) > > msg.vpu_inst_addr = vpu->inst_addr; > > else > > msg.inst_id = vpu->inst_id; > > + msg.codec_type = vpu->codec_type; > > > > err = vcodec_vpu_send_msg(vpu, &msg, sizeof(msg)); > > mtk_vcodec_debug(vpu, "- id=%X ret=%d", msg_id, err); > > @@ -149,14 +161,25 @@ int vpu_dec_init(struct vdec_vpu_inst *vpu) > > > > err = mtk_vcodec_fw_ipi_register(vpu->ctx->dev->fw_handler, > > vpu->id, > > vpu->handler, "vdec", NULL); > > - if (err != 0) { > > + if (err) { > > could be nice to send a patch with other such fixes, > anyway it is better to send unrelated fixes in a separate patch > will fix in next patch. > > mtk_vcodec_err(vpu, "vpu_ipi_register fail status=%d", > > err); > > return err; > > } > > > > + if (vpu->ctx->dev->vdec_pdata->hw_arch == > > MTK_VDEC_LAT_SINGLE_CORE) { > > + err = mtk_vcodec_fw_ipi_register(vpu->ctx->dev- > > >fw_handler, > > + vpu->core_id, vpu->handler, > > + "vdec", NULL); > > + if (err) { > > + mtk_vcodec_err(vpu, "vpu_ipi_register core fail > > status=%d", err); > > + return err; > > + } > > + } > > + > > memset(&msg, 0, sizeof(msg)); > > msg.msg_id = AP_IPIMSG_DEC_INIT; > > msg.ap_inst_addr = (unsigned long)vpu; > > + msg.codec_type = vpu->codec_type; > > > > mtk_vcodec_debug(vpu, "vdec_inst=%p", vpu); > > > > @@ -187,6 +210,7 @@ int vpu_dec_start(struct vdec_vpu_inst *vpu, > > uint32_t *data, unsigned int len) > > > > for (i = 0; i < len; i++) > > msg.data[i] = data[i]; > > + msg.codec_type = vpu->codec_type; > > I don't see where is the vpu->codec_type initialzied > This patch just add interface to support core hardware decode, in next serial patches based on these will used codec type to separate after these base patches are stable. > Thanks, > Dafna > Thanks Yunfei Dong > > > > err = vcodec_vpu_send_msg(vpu, (void *)&msg, sizeof(msg)); > > mtk_vcodec_debug(vpu, "- ret=%d", err); > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > index ae24b75d1649..802660770a87 100644 > > --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > @@ -14,6 +14,7 @@ struct mtk_vcodec_ctx; > > /** > > * struct vdec_vpu_inst - VPU instance for video codec > > * @id : ipi msg id for each decoder > > + * @core_id : core id used to separate different hardware > > * @vsi : driver structure allocated by VPU side and > > shared to AP side > > * for control and info share > > * @failure : VPU execution result status, 0: success, > > others: fail > > @@ -26,9 +27,11 @@ struct mtk_vcodec_ctx; > > * @dev : platform device of VPU > > * @wq : wait queue to wait VPU message ack > > * @handler : ipi handler for each decoder > > + * @codec_type : used codec type to separate different codecs > > */ > > struct vdec_vpu_inst { > > int id; > > + int core_id; > > void *vsi; > > int32_t failure; > > uint32_t inst_addr; > > @@ -38,6 +41,7 @@ struct vdec_vpu_inst { > > struct mtk_vcodec_ctx *ctx; > > wait_queue_head_t wq; > > mtk_vcodec_ipi_handler handler; > > + unsigned int codec_type; > > }; > > > > /** > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B108C432BE for ; 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b=ccOHzbIYnZHg1QcqbmjUluy9+G2TmSa9V5bB/GBOuVaQclqx07AFZJAPwZB8acs9LqLFU/6WQYgMgL/pfu6BiwjjsFBBVdkQpcvXjm8MIMcrysv918NP6gO/T6qXcT7KhOMtnmpkh6ZbtF/9PFNpkRmbLjtULH/46DU4UgV8s3E=; X-UUID: babf8903410b45e4942c23ea9c649c5d-20210901 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1555504542; Wed, 01 Sep 2021 23:15:40 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 1 Sep 2021 23:05:38 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 2 Sep 2021 14:05:36 +0800 Received: from mhfsdcap04 (10.17.3.154) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 2 Sep 2021 14:05:35 +0800 Message-ID: <5d53649c1fe2d6d6942e1dd31cdf7a0def46acab.camel@mediatek.com> Subject: Re: [PATCH v6, 15/15] media: mtk-vcodec: Use codec type to separate different hardware From: "yunfei.dong@mediatek.com" To: Dafna Hirschfeld , Alexandre Courbot , Hans Verkuil , "Tzung-Bi Shih" , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa , Laurent Pinchart CC: Daniel Vetter , dri-devel , Hsin-Yi Wang , "Fritz Koenig" , Irui Wang , , , , , , , Date: Thu, 2 Sep 2021 14:05:36 +0800 In-Reply-To: References: <20210901083215.25984-1-yunfei.dong@mediatek.com> <20210901083215.25984-16-yunfei.dong@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210901_231544_742603_82C9133A X-CRM114-Status: GOOD ( 38.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 2021-09-01 at 14:17 +0200, Dafna Hirschfeld wrote: Hi Dafna, Thanks for your suggestion. > Hi > > On 01.09.21 10:32, Yunfei Dong wrote: > > There are just one core thread, in order to separeate different > > hardware, using codec type to separeate it in scp driver. > > this code seems to relate to the vpu driver not the scp driver. > Is there a corresponding code added to the vpu driver that test the > codec_type? > Vpu is video processor unit, used to connect with micro processor. In mt8173: vdec_vpu_if.c -> mtk_vpu.c -> micro processor In mt8192/mt8183: vdec_vpu_if.c -> mtk_scp.c ->micro processor This init/dec start/dec_end interfaces are the same for vpu and scp. > > > > Signed-off-by: Yunfei Dong > > --- > > .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 12 ++++--- > > .../media/platform/mtk-vcodec/vdec_vpu_if.c | 34 > > ++++++++++++++++--- > > .../media/platform/mtk-vcodec/vdec_vpu_if.h | 4 +++ > > 3 files changed, 41 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > b/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > index 9d8079c4f976..c488f0c40190 100644 > > --- a/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > +++ b/drivers/media/platform/mtk-vcodec/vdec_ipi_msg.h > > @@ -35,6 +35,8 @@ enum vdec_ipi_msgid { > > * @msg_id : vdec_ipi_msgid > > * @vpu_inst_addr : VPU decoder instance address. Used if ABI > > version < 2. > > * @inst_id : instance ID. Used if the ABI version >= 2. > > + * @codec_type : Codec fourcc > > + * @reserved : reserved param > > */ > > struct vdec_ap_ipi_cmd { > > uint32_t msg_id; > > @@ -42,6 +44,8 @@ struct vdec_ap_ipi_cmd { > > uint32_t vpu_inst_addr; > > uint32_t inst_id; > > }; > > + uint32_t codec_type; > > + uint32_t reserved; > > }; > > > > /** > > @@ -59,12 +63,12 @@ struct vdec_vpu_ipi_ack { > > /** > > * struct vdec_ap_ipi_init - for AP_IPIMSG_DEC_INIT > > * @msg_id : AP_IPIMSG_DEC_INIT > > - * @reserved : Reserved field > > + * @codec_type : Codec fourcc > > * @ap_inst_addr : AP video decoder instance address > > */ > > struct vdec_ap_ipi_init { > > uint32_t msg_id; > > - uint32_t reserved; > > + uint32_t codec_type; > > uint64_t ap_inst_addr; > > }; > > > > @@ -77,7 +81,7 @@ struct vdec_ap_ipi_init { > > * H264 decoder [0]:buf_sz [1]:nal_start > > * VP8 decoder [0]:width/height > > * VP9 decoder [0]:profile, [1][2] width/height > > - * @reserved : Reserved field > > + * @codec_type : Codec fourcc > > */ > > struct vdec_ap_ipi_dec_start { > > uint32_t msg_id; > > @@ -86,7 +90,7 @@ struct vdec_ap_ipi_dec_start { > > uint32_t inst_id; > > }; > > uint32_t data[3]; > > - uint32_t reserved; > > + uint32_t codec_type; > > }; > > > > /** > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > index bfd8e87dceff..c84fac52fe26 100644 > > --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.c > > @@ -100,18 +100,29 @@ static void vpu_dec_ipi_handler(void *data, > > unsigned int len, void *priv) > > > > static int vcodec_vpu_send_msg(struct vdec_vpu_inst *vpu, void > > *msg, int len) > > { > > - int err; > > + int err, id, msgid; > > > > - mtk_vcodec_debug(vpu, "id=%X", *(uint32_t *)msg); > > + msgid = *(uint32_t *)msg; > > + mtk_vcodec_debug(vpu, "id=%X", msgid); > > > > vpu->failure = 0; > > vpu->signaled = 0; > > > > - err = mtk_vcodec_fw_ipi_send(vpu->ctx->dev->fw_handler, vpu- > > >id, msg, > > + if (vpu->ctx->dev->vdec_pdata->hw_arch == > > MTK_VDEC_LAT_SINGLE_CORE) { > > + if (msgid == AP_IPIMSG_DEC_CORE || > > + msgid == AP_IPIMSG_DEC_CORE_END) > > + id = vpu->core_id; > > + else > > + id = vpu->id; > > + } else { > > + id = vpu->id; > > + } > > + > > + err = mtk_vcodec_fw_ipi_send(vpu->ctx->dev->fw_handler, id, > > msg, > > len, 2000); > > so > > if (err) { > > mtk_vcodec_err(vpu, "send fail vpu_id=%d msg_id=%X > > status=%d", > > - vpu->id, *(uint32_t *)msg, err); > > + id, msgid, err); > > return err; > > } > > > > @@ -131,6 +142,7 @@ static int vcodec_send_ap_ipi(struct > > vdec_vpu_inst *vpu, unsigned int msg_id) > > msg.vpu_inst_addr = vpu->inst_addr; > > else > > msg.inst_id = vpu->inst_id; > > + msg.codec_type = vpu->codec_type; > > > > err = vcodec_vpu_send_msg(vpu, &msg, sizeof(msg)); > > mtk_vcodec_debug(vpu, "- id=%X ret=%d", msg_id, err); > > @@ -149,14 +161,25 @@ int vpu_dec_init(struct vdec_vpu_inst *vpu) > > > > err = mtk_vcodec_fw_ipi_register(vpu->ctx->dev->fw_handler, > > vpu->id, > > vpu->handler, "vdec", NULL); > > - if (err != 0) { > > + if (err) { > > could be nice to send a patch with other such fixes, > anyway it is better to send unrelated fixes in a separate patch > will fix in next patch. > > mtk_vcodec_err(vpu, "vpu_ipi_register fail status=%d", > > err); > > return err; > > } > > > > + if (vpu->ctx->dev->vdec_pdata->hw_arch == > > MTK_VDEC_LAT_SINGLE_CORE) { > > + err = mtk_vcodec_fw_ipi_register(vpu->ctx->dev- > > >fw_handler, > > + vpu->core_id, vpu->handler, > > + "vdec", NULL); > > + if (err) { > > + mtk_vcodec_err(vpu, "vpu_ipi_register core fail > > status=%d", err); > > + return err; > > + } > > + } > > + > > memset(&msg, 0, sizeof(msg)); > > msg.msg_id = AP_IPIMSG_DEC_INIT; > > msg.ap_inst_addr = (unsigned long)vpu; > > + msg.codec_type = vpu->codec_type; > > > > mtk_vcodec_debug(vpu, "vdec_inst=%p", vpu); > > > > @@ -187,6 +210,7 @@ int vpu_dec_start(struct vdec_vpu_inst *vpu, > > uint32_t *data, unsigned int len) > > > > for (i = 0; i < len; i++) > > msg.data[i] = data[i]; > > + msg.codec_type = vpu->codec_type; > > I don't see where is the vpu->codec_type initialzied > This patch just add interface to support core hardware decode, in next serial patches based on these will used codec type to separate after these base patches are stable. > Thanks, > Dafna > Thanks Yunfei Dong > > > > err = vcodec_vpu_send_msg(vpu, (void *)&msg, sizeof(msg)); > > mtk_vcodec_debug(vpu, "- ret=%d", err); > > diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > index ae24b75d1649..802660770a87 100644 > > --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h > > @@ -14,6 +14,7 @@ struct mtk_vcodec_ctx; > > /** > > * struct vdec_vpu_inst - VPU instance for video codec > > * @id : ipi msg id for each decoder > > + * @core_id : core id used to separate different hardware > > * @vsi : driver structure allocated by VPU side and > > shared to AP side > > * for control and info share > > * @failure : VPU execution result status, 0: success, > > others: fail > > @@ -26,9 +27,11 @@ struct mtk_vcodec_ctx; > > * @dev : platform device of VPU > > * @wq : wait queue to wait VPU message ack > > * @handler : ipi handler for each decoder > > + * @codec_type : used codec type to separate different codecs > > */ > > struct vdec_vpu_inst { > > int id; > > + int core_id; > > void *vsi; > > int32_t failure; > > uint32_t inst_addr; > > @@ -38,6 +41,7 @@ struct vdec_vpu_inst { > > struct mtk_vcodec_ctx *ctx; > > wait_queue_head_t wq; > > mtk_vcodec_ipi_handler handler; > > + unsigned int codec_type; > > }; > > > > /** > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel