From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB0FBC433FE for ; Fri, 11 Dec 2020 18:29:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D9F4723DE3 for ; Fri, 11 Dec 2020 18:28:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D9F4723DE3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:43408 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1knnA1-0005eK-HO for qemu-devel@archiver.kernel.org; Fri, 11 Dec 2020 13:28:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59962) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1knmW4-0000uz-08 for qemu-devel@nongnu.org; Fri, 11 Dec 2020 12:47:40 -0500 Received: from mx2.suse.de ([195.135.220.15]:54440) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1knmW1-0007iS-Qo for qemu-devel@nongnu.org; Fri, 11 Dec 2020 12:47:39 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 22F31ACF1; Fri, 11 Dec 2020 17:47:36 +0000 (UTC) Subject: Re: [PATCH v11 18/25] cpu: Move synchronize_from_tb() to tcg_ops To: Richard Henderson , Paolo Bonzini , Thomas Huth , Stefano Stabellini , Wenchao Wang , Roman Bolshakov , Sunil Muthuswamy , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= References: <20201211083143.14350-1-cfontana@suse.de> <20201211083143.14350-19-cfontana@suse.de> <78a7119d-1b4b-47dc-8f16-510708c9fcd4@linaro.org> <15b884b7-94e4-1476-f883-e84379b2661e@linaro.org> From: Claudio Fontana Message-ID: <5d9457df-c7c6-dd61-bbd7-1563d29102f8@suse.de> Date: Fri, 11 Dec 2020 18:47:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <15b884b7-94e4-1476-f883-e84379b2661e@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Eduardo Habkost , Paul Durrant , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Jason Wang , Marcelo Tosatti , qemu-devel@nongnu.org, Peter Xu , Dario Faggioli , Cameron Esfahani , haxm-team@intel.com, Colin Xu , Anthony Perard , Bruce Rogers , Olaf Hering , "Emilio G . Cota" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/11/20 6:28 PM, Richard Henderson wrote: > On 12/11/20 11:10 AM, Claudio Fontana wrote: >> On 12/11/20 6:05 PM, Richard Henderson wrote: >>> On 12/11/20 2:31 AM, Claudio Fontana wrote: >>>> From: Eduardo Habkost >>>> >>>> Signed-off-by: Eduardo Habkost >>>> [claudio: wrapped in CONFIG_TCG] >>>> Signed-off-by: Claudio Fontana >>>> Reviewed-by: Philippe Mathieu-Daudé >>>> Reviewed-by: Alex Bennée >>>> --- >>>> include/hw/core/cpu.h | 8 -------- >>>> include/hw/core/tcg-cpu-ops.h | 12 ++++++++++++ >>>> accel/tcg/cpu-exec.c | 4 ++-- >>>> target/arm/cpu.c | 4 +++- >>>> target/avr/cpu.c | 2 +- >>>> target/hppa/cpu.c | 2 +- >>>> target/i386/tcg/tcg-cpu.c | 2 +- >>>> target/microblaze/cpu.c | 2 +- >>>> target/mips/cpu.c | 4 +++- >>>> target/riscv/cpu.c | 2 +- >>>> target/rx/cpu.c | 2 +- >>>> target/sh4/cpu.c | 2 +- >>>> target/sparc/cpu.c | 2 +- >>>> target/tricore/cpu.c | 2 +- >>>> 14 files changed, 29 insertions(+), 21 deletions(-) >>>> >>>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >>>> index ea648d52ad..83007d262c 100644 >>>> --- a/include/hw/core/cpu.h >>>> +++ b/include/hw/core/cpu.h >>>> @@ -110,13 +110,6 @@ struct TranslationBlock; >>>> * If the target behaviour here is anything other than "set >>>> * the PC register to the value passed in" then the target must >>>> * also implement the synchronize_from_tb hook. >>>> - * @synchronize_from_tb: Callback for synchronizing state from a TCG >>>> - * #TranslationBlock. This is called when we abandon execution >>>> - * of a TB before starting it, and must set all parts of the CPU >>>> - * state which the previous TB in the chain may not have updated. >>>> - * This always includes at least the program counter; some targets >>>> - * will need to do more. If this hook is not implemented then the >>>> - * default is to call @set_pc(tb->pc). >>>> * @tlb_fill: Callback for handling a softmmu tlb miss or user-only >>>> * address fault. For system mode, if the access is valid, call >>>> * tlb_set_page and return true; if the access is invalid, and >>>> @@ -193,7 +186,6 @@ struct CPUClass { >>>> void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, >>>> Error **errp); >>>> void (*set_pc)(CPUState *cpu, vaddr value); >>>> - void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); >>>> bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, >>>> MMUAccessType access_type, int mmu_idx, >>>> bool probe, uintptr_t retaddr); >>>> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h >>>> index 4475ef0996..e1d50b3c8b 100644 >>>> --- a/include/hw/core/tcg-cpu-ops.h >>>> +++ b/include/hw/core/tcg-cpu-ops.h >>>> @@ -10,6 +10,8 @@ >>>> #ifndef TCG_CPU_OPS_H >>>> #define TCG_CPU_OPS_H >>>> >>>> +#include "hw/core/cpu.h" >>> >>> This include is circular. >> >> Yes, it's protected though, it was asked that way. > > Well, in my strong opinion, someone asked incorrectly. It's "harmless" because > of the protection ifdefs, but it's Wrong because it has the potential to hide bugs. > > What is it that you thought you needed from core/cpu.h anyway? > >>> Are you sure that splitting out hw/core/tcg-cpu-ops.h from hw/core/cpu.h in >>> patch 15 is even useful? >> >> it avoids a huge #ifdef CONFIG_TCG > > So? The question should be: is it useful on its own, and I think the answer to > that is clearly not. Thus it should not pretend to be a standalone header file. > > > r~ > The whole point of the exercise is to sort out what is tcg specific and only compile it under CONFIG_TCG. Having everything inside cpu.h wrapped in a 100 line #ifdef is not particularly readable or discoverable, so I think it is actually useful for understanding purposes to have it separate, but that said, I don't feel strongly on this, as I intend to improve this in later series. Thanks, Claudio