From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0D94C433DF for ; Wed, 19 Aug 2020 10:39:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A3A362076E for ; Wed, 19 Aug 2020 10:39:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597833583; bh=JgOkHxljjlEWKjxvXyX8OX88anY1gmQPeYvF0aYkVZY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=p8dGAQHgILCfqwGez5Sxx5f5nt6EHchPonbfeaLNmodTNHaqiDIXaAY+E1wzV36Vu vNCG7TpMVxKu662oocUTGPq4uQ+HSTWz2nRfaKTZsyFCK7JArWC3yoml94udlRz5sR /yt8UAQIIPtT05yHeiNpD9CThp8oKoHB/zJ2kxHA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727905AbgHSKjl (ORCPT ); Wed, 19 Aug 2020 06:39:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:53662 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726970AbgHSKj3 (ORCPT ); Wed, 19 Aug 2020 06:39:29 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C2E0A207BB; Wed, 19 Aug 2020 10:39:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597833568; bh=JgOkHxljjlEWKjxvXyX8OX88anY1gmQPeYvF0aYkVZY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ldlYV90L+TJeBv/oCYia0+kUrpDf9tyew8a2EUELuBeF80woiLZndfWQCVUdUyBSS N1DTigmOO7l9XxQ2dRmzjPyA+Q05Ra75uXQj9/9WSC4th8n3Yvvh4+tJly3SuzHWWR 184F36ZpNWf0FzJZwWu5hoSC7VhKdhhGlXTYICOg= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1k8LV9-004Aa2-By; Wed, 19 Aug 2020 11:39:27 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 19 Aug 2020 11:39:27 +0100 From: Marc Zyngier To: Jianyong Wu Cc: Paolo Bonzini , Peng Hao , kernel-team@android.com, kvm@vger.kernel.org, Will Deacon , Catalin Marinas , Alexander Graf , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 47/56] KVM: arm64: timers: Move timer registers to the sys_regs file In-Reply-To: References: <20200805175700.62775-1-maz@kernel.org> <20200805175700.62775-48-maz@kernel.org> <551eac52dcd3b19ae6db45dd6f6e168b@kernel.org> User-Agent: Roundcube Webmail/1.4.7 Message-ID: <5dd5ccf145b366e562782f117f25d880@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: Jianyong.Wu@arm.com, pbonzini@redhat.com, richard.peng@oppo.com, kernel-team@android.com, kvm@vger.kernel.org, will@kernel.org, Catalin.Marinas@arm.com, graf@amazon.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 2020-08-19 11:18, Jianyong Wu wrote: >> -----Original Message----- >> From: Marc Zyngier >> Sent: Wednesday, August 19, 2020 6:00 PM >> To: Jianyong Wu >> Cc: Paolo Bonzini ; Peng Hao >> ; kernel-team@android.com; >> kvm@vger.kernel.org; Will Deacon ; Catalin Marinas >> ; Alexander Graf ; >> kvmarm@lists.cs.columbia.edu; linux-arm-kernel@lists.infradead.org >> Subject: Re: [PATCH 47/56] KVM: arm64: timers: Move timer registers to >> the >> sys_regs file >> >> On 2020-08-19 10:24, Jianyong Wu wrote: >> > Hi Marc, >> > >> > -----Original Message----- >> > From: kvmarm-bounces@lists.cs.columbia.edu >> > On Behalf Of Marc Zyngier >> > Sent: Thursday, August 6, 2020 1:57 AM >> > To: Paolo Bonzini >> > Cc: Peng Hao ; kernel-team@android.com; >> > kvm@vger.kernel.org; Will Deacon ; Catalin Marinas >> > ; Alexander Graf ; >> > kvmarm@lists.cs.columbia.edu; linux-arm-kernel@lists.infradead.org >> > Subject: [PATCH 47/56] KVM: arm64: timers: Move timer registers to the >> > sys_regs file >> > >> > Move the timer gsisters to the sysreg file. This will further help >> > when they are directly changed by a nesting hypervisor in the VNCR >> > page. >> > >> > This requires moving the initialisation of the timer struct so that >> > some of the helpers (such as arch_timer_ctx_index) can work correctly >> > at an early stage. >> > >> > Signed-off-by: Marc Zyngier >> > --- >> > arch/arm64/include/asm/kvm_host.h | 6 ++ >> > arch/arm64/kvm/arch_timer.c | 155 +++++++++++++++++++++++------- >> > arch/arm64/kvm/trace_arm.h | 8 +- >> > include/kvm/arm_arch_timer.h | 11 +-- >> > 4 files changed, 136 insertions(+), 44 deletions(-) >> > >> > +static u64 timer_get_offset(struct arch_timer_context *ctxt) { >> > + struct kvm_vcpu *vcpu = ctxt->vcpu; >> > + >> > + switch(arch_timer_ctx_index(ctxt)) { >> > + case TIMER_VTIMER: >> > + return __vcpu_sys_reg(vcpu, CNTVOFF_EL2); >> > + default: >> > + return 0; >> > + } >> > +} >> > + >> > Can I export this helper? As in my ptp_kvm implementation I need get >> > VCNT offset value separately not just give me a result of VCNT. >> >> Sorry, you need to give me a bit more context. What do you need the >> offset >> for exactly? > > Yeah, > In my ptp_kvm implementation, I need acquire wall time and counter > cycle in the same time in host. After get host counter cycle, I need > subtract it by VCNT offset to obtain VCNT. See > https://lkml.org/lkml/2020/6/19/441 > https://lkml.org/lkml/2020/6/19/441 > But now I can't get the VCNT offset easily like before using " > vcpu_vtimer(vcpu)->cntvoff" and I can't use the helper like > "kvm_arm_timer_read" as I need acquire the counter cycle in the same > time with the host wall time. I must be missing something. CNTVOFF_EL2 is now implemented as a standard system register, and has the same visibility as any other vcpu sysreg. Why doesn't vcpu_read_sys_reg(vcpu, CNTVOFF_EL2) work for you? M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94734C433DF for ; Wed, 19 Aug 2020 10:39:35 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 1994E2072D for ; Wed, 19 Aug 2020 10:39:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="ldlYV90L" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1994E2072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 5FFB94B9F5; Wed, 19 Aug 2020 06:39:34 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@kernel.org Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8nGj8Grnffzs; Wed, 19 Aug 2020 06:39:32 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 3BB694B9EC; Wed, 19 Aug 2020 06:39:32 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 2CEA14B9DE for ; Wed, 19 Aug 2020 06:39:31 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qe0l7ZTe8mCY for ; Wed, 19 Aug 2020 06:39:30 -0400 (EDT) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id D907E4B9DB for ; Wed, 19 Aug 2020 06:39:29 -0400 (EDT) Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C2E0A207BB; Wed, 19 Aug 2020 10:39:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597833568; bh=JgOkHxljjlEWKjxvXyX8OX88anY1gmQPeYvF0aYkVZY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ldlYV90L+TJeBv/oCYia0+kUrpDf9tyew8a2EUELuBeF80woiLZndfWQCVUdUyBSS N1DTigmOO7l9XxQ2dRmzjPyA+Q05Ra75uXQj9/9WSC4th8n3Yvvh4+tJly3SuzHWWR 184F36ZpNWf0FzJZwWu5hoSC7VhKdhhGlXTYICOg= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1k8LV9-004Aa2-By; Wed, 19 Aug 2020 11:39:27 +0100 MIME-Version: 1.0 Date: Wed, 19 Aug 2020 11:39:27 +0100 From: Marc Zyngier To: Jianyong Wu Subject: Re: [PATCH 47/56] KVM: arm64: timers: Move timer registers to the sys_regs file In-Reply-To: References: <20200805175700.62775-1-maz@kernel.org> <20200805175700.62775-48-maz@kernel.org> <551eac52dcd3b19ae6db45dd6f6e168b@kernel.org> User-Agent: Roundcube Webmail/1.4.7 Message-ID: <5dd5ccf145b366e562782f117f25d880@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: Jianyong.Wu@arm.com, pbonzini@redhat.com, richard.peng@oppo.com, kernel-team@android.com, kvm@vger.kernel.org, will@kernel.org, Catalin.Marinas@arm.com, graf@amazon.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: Peng Hao , kvm@vger.kernel.org, kernel-team@android.com, Alexander Graf , Catalin Marinas , Paolo Bonzini , Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 2020-08-19 11:18, Jianyong Wu wrote: >> -----Original Message----- >> From: Marc Zyngier >> Sent: Wednesday, August 19, 2020 6:00 PM >> To: Jianyong Wu >> Cc: Paolo Bonzini ; Peng Hao >> ; kernel-team@android.com; >> kvm@vger.kernel.org; Will Deacon ; Catalin Marinas >> ; Alexander Graf ; >> kvmarm@lists.cs.columbia.edu; linux-arm-kernel@lists.infradead.org >> Subject: Re: [PATCH 47/56] KVM: arm64: timers: Move timer registers to >> the >> sys_regs file >> >> On 2020-08-19 10:24, Jianyong Wu wrote: >> > Hi Marc, >> > >> > -----Original Message----- >> > From: kvmarm-bounces@lists.cs.columbia.edu >> > On Behalf Of Marc Zyngier >> > Sent: Thursday, August 6, 2020 1:57 AM >> > To: Paolo Bonzini >> > Cc: Peng Hao ; kernel-team@android.com; >> > kvm@vger.kernel.org; Will Deacon ; Catalin Marinas >> > ; Alexander Graf ; >> > kvmarm@lists.cs.columbia.edu; linux-arm-kernel@lists.infradead.org >> > Subject: [PATCH 47/56] KVM: arm64: timers: Move timer registers to the >> > sys_regs file >> > >> > Move the timer gsisters to the sysreg file. This will further help >> > when they are directly changed by a nesting hypervisor in the VNCR >> > page. >> > >> > This requires moving the initialisation of the timer struct so that >> > some of the helpers (such as arch_timer_ctx_index) can work correctly >> > at an early stage. >> > >> > Signed-off-by: Marc Zyngier >> > --- >> > arch/arm64/include/asm/kvm_host.h | 6 ++ >> > arch/arm64/kvm/arch_timer.c | 155 +++++++++++++++++++++++------- >> > arch/arm64/kvm/trace_arm.h | 8 +- >> > include/kvm/arm_arch_timer.h | 11 +-- >> > 4 files changed, 136 insertions(+), 44 deletions(-) >> > >> > +static u64 timer_get_offset(struct arch_timer_context *ctxt) { >> > + struct kvm_vcpu *vcpu = ctxt->vcpu; >> > + >> > + switch(arch_timer_ctx_index(ctxt)) { >> > + case TIMER_VTIMER: >> > + return __vcpu_sys_reg(vcpu, CNTVOFF_EL2); >> > + default: >> > + return 0; >> > + } >> > +} >> > + >> > Can I export this helper? As in my ptp_kvm implementation I need get >> > VCNT offset value separately not just give me a result of VCNT. >> >> Sorry, you need to give me a bit more context. What do you need the >> offset >> for exactly? > > Yeah, > In my ptp_kvm implementation, I need acquire wall time and counter > cycle in the same time in host. After get host counter cycle, I need > subtract it by VCNT offset to obtain VCNT. See > https://lkml.org/lkml/2020/6/19/441 > https://lkml.org/lkml/2020/6/19/441 > But now I can't get the VCNT offset easily like before using " > vcpu_vtimer(vcpu)->cntvoff" and I can't use the helper like > "kvm_arm_timer_read" as I need acquire the counter cycle in the same > time with the host wall time. I must be missing something. CNTVOFF_EL2 is now implemented as a standard system register, and has the same visibility as any other vcpu sysreg. Why doesn't vcpu_read_sys_reg(vcpu, CNTVOFF_EL2) work for you? M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF5D2C433E1 for ; Wed, 19 Aug 2020 10:40:53 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 989E6205CB for ; Wed, 19 Aug 2020 10:40:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="0G45Rt8L"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="ldlYV90L" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 989E6205CB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:To:From: Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Z6it5+8S3USKFHTed3C7WBg52y3wWf1dDabJW9IKmNo=; b=0G45Rt8LxanWo/z+Dfp1y1ML9 WKLpx1c7gQ43pjh4hSJdy+hyYvFwq7UTAGJw2Nd0umsnqGcG8XOEC7MQU9xbusLj5hAfy9zzDXAQA plKoqNueITMPQdvdwBpPtAK2dGjTHcdpTXmXqpl+FcON8K2GKP0mVDLkmAiCX61JRrZmAuOBTi6y4 ibFgPr+IRc9ixv/YC0pmFhLdqPzB0tg4OhbY5/48JZatB3I6m3m7zzCvMBWg07/arKrf6nzArfwRp PxIUNh7zYB3dzkAgHP0q6To4arql8TejRlBGWrFYdPicwcri1WR+Cg/KFUcJpKBw8kNoEqnUUlYcG 23OoFAbkA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k8LVD-0000bv-SL; Wed, 19 Aug 2020 10:39:31 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k8LVB-0000bC-Md for linux-arm-kernel@lists.infradead.org; Wed, 19 Aug 2020 10:39:30 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C2E0A207BB; Wed, 19 Aug 2020 10:39:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597833568; bh=JgOkHxljjlEWKjxvXyX8OX88anY1gmQPeYvF0aYkVZY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ldlYV90L+TJeBv/oCYia0+kUrpDf9tyew8a2EUELuBeF80woiLZndfWQCVUdUyBSS N1DTigmOO7l9XxQ2dRmzjPyA+Q05Ra75uXQj9/9WSC4th8n3Yvvh4+tJly3SuzHWWR 184F36ZpNWf0FzJZwWu5hoSC7VhKdhhGlXTYICOg= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1k8LV9-004Aa2-By; Wed, 19 Aug 2020 11:39:27 +0100 MIME-Version: 1.0 Date: Wed, 19 Aug 2020 11:39:27 +0100 From: Marc Zyngier To: Jianyong Wu Subject: Re: [PATCH 47/56] KVM: arm64: timers: Move timer registers to the sys_regs file In-Reply-To: References: <20200805175700.62775-1-maz@kernel.org> <20200805175700.62775-48-maz@kernel.org> <551eac52dcd3b19ae6db45dd6f6e168b@kernel.org> User-Agent: Roundcube Webmail/1.4.7 Message-ID: <5dd5ccf145b366e562782f117f25d880@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: Jianyong.Wu@arm.com, pbonzini@redhat.com, richard.peng@oppo.com, kernel-team@android.com, kvm@vger.kernel.org, will@kernel.org, Catalin.Marinas@arm.com, graf@amazon.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200819_063929_892160_BE4A77D5 X-CRM114-Status: GOOD ( 25.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Hao , kvm@vger.kernel.org, kernel-team@android.com, Alexander Graf , Catalin Marinas , Paolo Bonzini , Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-08-19 11:18, Jianyong Wu wrote: >> -----Original Message----- >> From: Marc Zyngier >> Sent: Wednesday, August 19, 2020 6:00 PM >> To: Jianyong Wu >> Cc: Paolo Bonzini ; Peng Hao >> ; kernel-team@android.com; >> kvm@vger.kernel.org; Will Deacon ; Catalin Marinas >> ; Alexander Graf ; >> kvmarm@lists.cs.columbia.edu; linux-arm-kernel@lists.infradead.org >> Subject: Re: [PATCH 47/56] KVM: arm64: timers: Move timer registers to >> the >> sys_regs file >> >> On 2020-08-19 10:24, Jianyong Wu wrote: >> > Hi Marc, >> > >> > -----Original Message----- >> > From: kvmarm-bounces@lists.cs.columbia.edu >> > On Behalf Of Marc Zyngier >> > Sent: Thursday, August 6, 2020 1:57 AM >> > To: Paolo Bonzini >> > Cc: Peng Hao ; kernel-team@android.com; >> > kvm@vger.kernel.org; Will Deacon ; Catalin Marinas >> > ; Alexander Graf ; >> > kvmarm@lists.cs.columbia.edu; linux-arm-kernel@lists.infradead.org >> > Subject: [PATCH 47/56] KVM: arm64: timers: Move timer registers to the >> > sys_regs file >> > >> > Move the timer gsisters to the sysreg file. This will further help >> > when they are directly changed by a nesting hypervisor in the VNCR >> > page. >> > >> > This requires moving the initialisation of the timer struct so that >> > some of the helpers (such as arch_timer_ctx_index) can work correctly >> > at an early stage. >> > >> > Signed-off-by: Marc Zyngier >> > --- >> > arch/arm64/include/asm/kvm_host.h | 6 ++ >> > arch/arm64/kvm/arch_timer.c | 155 +++++++++++++++++++++++------- >> > arch/arm64/kvm/trace_arm.h | 8 +- >> > include/kvm/arm_arch_timer.h | 11 +-- >> > 4 files changed, 136 insertions(+), 44 deletions(-) >> > >> > +static u64 timer_get_offset(struct arch_timer_context *ctxt) { >> > + struct kvm_vcpu *vcpu = ctxt->vcpu; >> > + >> > + switch(arch_timer_ctx_index(ctxt)) { >> > + case TIMER_VTIMER: >> > + return __vcpu_sys_reg(vcpu, CNTVOFF_EL2); >> > + default: >> > + return 0; >> > + } >> > +} >> > + >> > Can I export this helper? As in my ptp_kvm implementation I need get >> > VCNT offset value separately not just give me a result of VCNT. >> >> Sorry, you need to give me a bit more context. What do you need the >> offset >> for exactly? > > Yeah, > In my ptp_kvm implementation, I need acquire wall time and counter > cycle in the same time in host. After get host counter cycle, I need > subtract it by VCNT offset to obtain VCNT. See > https://lkml.org/lkml/2020/6/19/441 > https://lkml.org/lkml/2020/6/19/441 > But now I can't get the VCNT offset easily like before using " > vcpu_vtimer(vcpu)->cntvoff" and I can't use the helper like > "kvm_arm_timer_read" as I need acquire the counter cycle in the same > time with the host wall time. I must be missing something. CNTVOFF_EL2 is now implemented as a standard system register, and has the same visibility as any other vcpu sysreg. Why doesn't vcpu_read_sys_reg(vcpu, CNTVOFF_EL2) work for you? M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel