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From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Lee Jones <lee.jones@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Liviu Dudau <liviu.dudau@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Subject: Re: [PATCH 08/10] ARM: dts: exynos: use proper 'dma-channels/requests' properties
Date: Thu, 28 Apr 2022 11:50:24 +0200	[thread overview]
Message-ID: <5eeac2a0-4293-675e-9dc2-25ed8ab3fb8f@samsung.com> (raw)
In-Reply-To: <20220427155840.596535-9-krzysztof.kozlowski@linaro.org>

Hi Krzysztof,

On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Are those properties really needed for PL330 driver on Exynos SoCs? I've 
removed them and I still see the proper values read from registers and 
reported in the log (Exynos4210):

dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12680000.dma-controller:       DBUFF-32x4bytes Num_Chans-8 
Num_Peri-32 Num_Events-32
dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12690000.dma-controller:       DBUFF-32x4bytes Num_Chans-8 
Num_Peri-32 Num_Events-32
dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12850000.dma-controller:       DBUFF-64x8bytes Num_Chans-8 
Num_Peri-1 Num_Events-32

I also don't see any code that would read those properties. IMHO they 
should be simply removed at all, at least for the PL330 related nodes.

> ---
>   arch/arm/boot/dts/exynos3250.dtsi             |  8 ++++----
>   arch/arm/boot/dts/exynos4.dtsi                | 12 +++++------
>   .../boot/dts/exynos4210-universal_c210.dts    |  4 ++--
>   arch/arm/boot/dts/exynos5250.dtsi             | 16 +++++++--------
>   arch/arm/boot/dts/exynos5410.dtsi             |  8 ++++----
>   arch/arm/boot/dts/exynos5420.dtsi             | 20 +++++++++----------
>   6 files changed, 34 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 41bb421e67c2..7bdd4f0782c3 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 {
>   			clocks = <&cmu CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@12690000 {
> @@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 {
>   			clocks = <&cmu CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		adc: adc@126c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index 5fd17bc52321..2a244aaf84b4 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@12690000 {
> @@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		mdma1: dma-controller@12850000 {
> @@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 {
>   			clocks = <&clock CLK_MDMA>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		fimd: fimd@11c00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 138d606d58a5..c1b11704b8ee 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 {
>   		clocks = <&clock CLK_MDMA>;
>   		clock-names = "apb_pclk";
>   		#dma-cells = <1>;
> -		#dma-channels = <8>;
> -		#dma-requests = <1>;
> +		dma-channels = <8>;
> +		dma-requests = <1>;
>   		power-domains = <&pd_lcd0>;
>   	};
>   };
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index df80ddfada2d..c4c0b4c08094 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@121b0000 {
> @@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		mdma0: dma-controller@10800000 {
> @@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 {
>   			clocks = <&clock CLK_MDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		mdma1: dma-controller@11c10000 {
> @@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 {
>   			clocks = <&clock CLK_MDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		gsc_0: gsc@13e00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
> index 4d797a9abba4..6dc08cb0622c 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@121b0000 {
> @@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		audi2s0: i2s@3830000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 21b608705049..08198d82ce8d 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -437,8 +437,8 @@ adma: dma-controller@3880000 {
>   			clocks = <&clock_audss EXYNOS_ADMA>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <6>;
> -			#dma-requests = <16>;
> +			dma-channels = <6>;
> +			dma-requests = <16>;
>   			power-domains = <&mau_pd>;
>   		};
>   
> @@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@121b0000 {
> @@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		mdma0: dma-controller@10800000 {
> @@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 {
>   			clocks = <&clock CLK_MDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		mdma1: dma-controller@11c10000 {
> @@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 {
>   			clocks = <&clock CLK_MDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   			/*
>   			 * MDMA1 can support both secure and non-secure
>   			 * AXI transactions. When this is enabled in

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland


WARNING: multiple messages have this Message-ID
From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Lee Jones <lee.jones@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Liviu Dudau <liviu.dudau@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Subject: Re: [PATCH 08/10] ARM: dts: exynos: use proper 'dma-channels/requests' properties
Date: Thu, 28 Apr 2022 11:50:24 +0200	[thread overview]
Message-ID: <5eeac2a0-4293-675e-9dc2-25ed8ab3fb8f@samsung.com> (raw)
In-Reply-To: <20220427155840.596535-9-krzysztof.kozlowski@linaro.org>

Hi Krzysztof,

On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Are those properties really needed for PL330 driver on Exynos SoCs? I've 
removed them and I still see the proper values read from registers and 
reported in the log (Exynos4210):

dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12680000.dma-controller:       DBUFF-32x4bytes Num_Chans-8 
Num_Peri-32 Num_Events-32
dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12690000.dma-controller:       DBUFF-32x4bytes Num_Chans-8 
Num_Peri-32 Num_Events-32
dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12850000.dma-controller:       DBUFF-64x8bytes Num_Chans-8 
Num_Peri-1 Num_Events-32

I also don't see any code that would read those properties. IMHO they 
should be simply removed at all, at least for the PL330 related nodes.

> ---
>   arch/arm/boot/dts/exynos3250.dtsi             |  8 ++++----
>   arch/arm/boot/dts/exynos4.dtsi                | 12 +++++------
>   .../boot/dts/exynos4210-universal_c210.dts    |  4 ++--
>   arch/arm/boot/dts/exynos5250.dtsi             | 16 +++++++--------
>   arch/arm/boot/dts/exynos5410.dtsi             |  8 ++++----
>   arch/arm/boot/dts/exynos5420.dtsi             | 20 +++++++++----------
>   6 files changed, 34 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 41bb421e67c2..7bdd4f0782c3 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 {
>   			clocks = <&cmu CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@12690000 {
> @@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 {
>   			clocks = <&cmu CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		adc: adc@126c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index 5fd17bc52321..2a244aaf84b4 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@12690000 {
> @@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		mdma1: dma-controller@12850000 {
> @@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 {
>   			clocks = <&clock CLK_MDMA>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		fimd: fimd@11c00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 138d606d58a5..c1b11704b8ee 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 {
>   		clocks = <&clock CLK_MDMA>;
>   		clock-names = "apb_pclk";
>   		#dma-cells = <1>;
> -		#dma-channels = <8>;
> -		#dma-requests = <1>;
> +		dma-channels = <8>;
> +		dma-requests = <1>;
>   		power-domains = <&pd_lcd0>;
>   	};
>   };
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index df80ddfada2d..c4c0b4c08094 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@121b0000 {
> @@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		mdma0: dma-controller@10800000 {
> @@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 {
>   			clocks = <&clock CLK_MDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		mdma1: dma-controller@11c10000 {
> @@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 {
>   			clocks = <&clock CLK_MDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		gsc_0: gsc@13e00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
> index 4d797a9abba4..6dc08cb0622c 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@121b0000 {
> @@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		audi2s0: i2s@3830000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 21b608705049..08198d82ce8d 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -437,8 +437,8 @@ adma: dma-controller@3880000 {
>   			clocks = <&clock_audss EXYNOS_ADMA>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <6>;
> -			#dma-requests = <16>;
> +			dma-channels = <6>;
> +			dma-requests = <16>;
>   			power-domains = <&mau_pd>;
>   		};
>   
> @@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 {
>   			clocks = <&clock CLK_PDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		pdma1: dma-controller@121b0000 {
> @@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 {
>   			clocks = <&clock CLK_PDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <32>;
> +			dma-channels = <8>;
> +			dma-requests = <32>;
>   		};
>   
>   		mdma0: dma-controller@10800000 {
> @@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 {
>   			clocks = <&clock CLK_MDMA0>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   		};
>   
>   		mdma1: dma-controller@11c10000 {
> @@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 {
>   			clocks = <&clock CLK_MDMA1>;
>   			clock-names = "apb_pclk";
>   			#dma-cells = <1>;
> -			#dma-channels = <8>;
> -			#dma-requests = <1>;
> +			dma-channels = <8>;
> +			dma-requests = <1>;
>   			/*
>   			 * MDMA1 can support both secure and non-secure
>   			 * AXI transactions. When this is enabled in

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland


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  parent reply	other threads:[~2022-04-28 10:02 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-27 15:58 [PATCH 00/10] ARM/arm64: dts: " Krzysztof Kozlowski
2022-04-27 15:58 ` Krzysztof Kozlowski
2022-04-27 15:58 ` [PATCH 01/10] ARM: dts: zynq-7000: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-28  6:24   ` Michal Simek
2022-04-28  6:24     ` Michal Simek
2022-04-27 15:58 ` [PATCH 02/10] ARM: dts: socfpga: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 15:58 ` [PATCH 03/10] arm64: dts: stratix10/agilex: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 15:58 ` [PATCH 04/10] arm64: dts: juno: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-28 10:43   ` Robin Murphy
2022-04-28 10:43     ` Robin Murphy
2022-04-28 10:45     ` Krzysztof Kozlowski
2022-04-28 10:45       ` Krzysztof Kozlowski
2022-04-27 15:58 ` [PATCH 05/10] arm64: dts: broadcom: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 15:58 ` [PATCH 06/10] dt-bindings: mfd: samsung,exynos5433-lpass: fix " Krzysztof Kozlowski
2022-04-27 15:58   ` [PATCH 06/10] dt-bindings: mfd: samsung, exynos5433-lpass: " Krzysztof Kozlowski
2022-04-27 16:41   ` [PATCH 06/10] dt-bindings: mfd: samsung,exynos5433-lpass: " Alim Akhtar
2022-04-27 16:41     ` Alim Akhtar
2022-04-27 18:25   ` Rob Herring
2022-04-27 18:25     ` Rob Herring
2022-04-28  9:53   ` Lee Jones
2022-04-28  9:53     ` Lee Jones
2022-04-27 15:58 ` [PATCH 07/10] ARM: dts: s5pv210: use proper " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 16:45   ` Alim Akhtar
2022-04-27 16:45     ` Alim Akhtar
2022-04-27 15:58 ` [PATCH 08/10] ARM: dts: exynos: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 16:44   ` Alim Akhtar
2022-04-27 16:44     ` Alim Akhtar
2022-04-28  9:50   ` Marek Szyprowski [this message]
2022-04-28  9:50     ` Marek Szyprowski
2022-04-28  9:54     ` Krzysztof Kozlowski
2022-04-28  9:54       ` Krzysztof Kozlowski
2022-04-28  9:57       ` Marek Szyprowski
2022-04-28  9:57         ` Marek Szyprowski
2022-04-28 10:00         ` Krzysztof Kozlowski
2022-04-28 10:00           ` Krzysztof Kozlowski
2022-04-28 10:05           ` Marek Szyprowski
2022-04-28 10:05             ` Marek Szyprowski
2022-04-28 10:09             ` Krzysztof Kozlowski
2022-04-28 10:09               ` Krzysztof Kozlowski
2022-04-28 13:33               ` Rob Herring
2022-04-28 13:33                 ` Rob Herring
2022-04-28  9:55     ` Alim Akhtar
2022-04-28  9:55       ` Alim Akhtar
2022-04-27 15:58 ` [PATCH 09/10] arm64: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 16:46   ` Alim Akhtar
2022-04-27 16:46     ` Alim Akhtar
2022-04-27 15:58 ` [PATCH 10/10] arm64: dts: fsd: " Krzysztof Kozlowski
2022-04-27 15:58   ` Krzysztof Kozlowski
2022-04-27 16:49   ` Alim Akhtar
2022-04-27 16:49     ` Alim Akhtar

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