From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Date: Tue, 8 Oct 2019 10:55:15 +0800 Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in function In-Reply-To: References: Message-ID: <5f27cfa6-0574-848c-af3d-66cdbccf2988@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On 2019/10/7 上午12:28, Simon South wrote: > Fix a pair of tests in phy_dll_bypass_set() that used incorrect units > for the DDR frequency, causing the DRAM controller to be misconfigured > in most cases. > > Signed-off-by: Simon South Reviewed-by: Kever Yang Thanks, - Kever > --- > drivers/ram/rockchip/sdram_rk3328.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c > index 656696ac3c..0541bbadf0 100644 > --- a/drivers/ram/rockchip/sdram_rk3328.c > +++ b/drivers/ram/rockchip/sdram_rk3328.c > @@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq) > setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4); > clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3); > > - if (freq <= (400 * MHz)) > + if (freq <= 400) > /* DLL bypass */ > setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); > else > clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); > - if (freq <= (680 * MHz)) > + if (freq <= 680) > tmp = 2; > else > tmp = 1;