From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A451C04AAF for ; Thu, 16 May 2019 10:32:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 10D7D20881 for ; Thu, 16 May 2019 10:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726995AbfEPKcM (ORCPT ); Thu, 16 May 2019 06:32:12 -0400 Received: from relay9-d.mail.gandi.net ([217.70.183.199]:45061 "EHLO relay9-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726941AbfEPKcL (ORCPT ); Thu, 16 May 2019 06:32:11 -0400 X-Originating-IP: 80.215.244.179 Received: from localhost (unknown [80.215.244.179]) (Authenticated sender: maxime.ripard@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 0CCB8FF811; Thu, 16 May 2019 10:31:59 +0000 (UTC) From: Maxime Ripard To: Daniel Vetter , David Airlie , Maarten Lankhorst , Sean Paul , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Emil Velikov , Paul Kocialkowski Subject: [PATCH v3 2/7] drm: Remove users of drm_format_num_planes Date: Thu, 16 May 2019 12:31:47 +0200 Message-Id: <5ffcec9d14a50ed538e37d565f546802452ee672.1558002671.git-series.maxime.ripard@bootlin.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <27b0041c7977402df4a087c78d2849ffe51c9f1c.1558002671.git-series.maxime.ripard@bootlin.com> References: <27b0041c7977402df4a087c78d2849ffe51c9f1c.1558002671.git-series.maxime.ripard@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org drm_format_num_planes() is basically a lookup in the drm_format_info table plus an access to the num_planes field of the appropriate entry. Most drivers are using this function while having access to the entry already, which means that we will perform an unnecessary lookup. Removing the call to drm_format_num_planes is therefore more efficient. Some drivers will not have access to that entry in the function, but in this case the overhead is minimal (we just have to call drm_format_info() to perform the lookup) and we can even avoid multiple, inefficient lookups in some places that need multiple fields from the drm_format_info structure. Reviewed-by: Emil Velikov Reviewed-by: Paul Kocialkowski Signed-off-by: Maxime Ripard --- drivers/gpu/drm/arm/malidp_mw.c | 2 +- drivers/gpu/drm/armada/armada_fb.c | 3 ++- drivers/gpu/drm/drm_fourcc.c | 16 ---------------- drivers/gpu/drm/mediatek/mtk_drm_fb.c | 6 ++++-- drivers/gpu/drm/meson/meson_overlay.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 9 ++++++--- drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c | 3 ++- drivers/gpu/drm/msm/msm_fb.c | 8 ++++++-- drivers/gpu/drm/omapdrm/omap_fb.c | 4 +++- drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 6 +++--- drivers/gpu/drm/tegra/fb.c | 3 ++- drivers/gpu/drm/vc4/vc4_plane.c | 2 +- drivers/gpu/drm/zte/zx_plane.c | 4 +--- include/drm/drm_fourcc.h | 1 - 14 files changed, 32 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c index 5f102bdaf841..2e812525025d 100644 --- a/drivers/gpu/drm/arm/malidp_mw.c +++ b/drivers/gpu/drm/arm/malidp_mw.c @@ -158,7 +158,7 @@ malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, return -EINVAL; } - n_planes = drm_format_num_planes(fb->format->format); + n_planes = fb->format->num_planes; for (i = 0; i < n_planes; i++) { struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, i); /* memory write buffers are never rotated */ diff --git a/drivers/gpu/drm/armada/armada_fb.c b/drivers/gpu/drm/armada/armada_fb.c index 058ac7d9920f..a2f6472eb482 100644 --- a/drivers/gpu/drm/armada/armada_fb.c +++ b/drivers/gpu/drm/armada/armada_fb.c @@ -87,6 +87,7 @@ struct armada_framebuffer *armada_framebuffer_create(struct drm_device *dev, struct drm_framebuffer *armada_fb_create(struct drm_device *dev, struct drm_file *dfile, const struct drm_mode_fb_cmd2 *mode) { + const struct drm_format_info *info = drm_get_format_info(dev, mode); struct armada_gem_object *obj; struct armada_framebuffer *dfb; int ret; @@ -97,7 +98,7 @@ struct drm_framebuffer *armada_fb_create(struct drm_device *dev, mode->pitches[2]); /* We can only handle a single plane at the moment */ - if (drm_format_num_planes(mode->pixel_format) > 1 && + if (info->num_planes > 1 && (mode->handles[0] != mode->handles[1] || mode->handles[0] != mode->handles[2])) { ret = -EINVAL; diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index 6ea55fb4526d..873c0001d8c8 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -333,22 +333,6 @@ drm_get_format_info(struct drm_device *dev, EXPORT_SYMBOL(drm_get_format_info); /** - * drm_format_num_planes - get the number of planes for format - * @format: pixel format (DRM_FORMAT_*) - * - * Returns: - * The number of planes used by the specified pixel format. - */ -int drm_format_num_planes(uint32_t format) -{ - const struct drm_format_info *info; - - info = drm_format_info(format); - return info ? info->num_planes : 1; -} -EXPORT_SYMBOL(drm_format_num_planes); - -/** * drm_format_plane_cpp - determine the bytes per pixel value * @format: pixel format (DRM_FORMAT_*) * @plane: plane index diff --git a/drivers/gpu/drm/mediatek/mtk_drm_fb.c b/drivers/gpu/drm/mediatek/mtk_drm_fb.c index e20fcaef2851..68fdef8b12bd 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_fb.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_fb.c @@ -32,10 +32,11 @@ static struct drm_framebuffer *mtk_drm_framebuffer_init(struct drm_device *dev, const struct drm_mode_fb_cmd2 *mode, struct drm_gem_object *obj) { + const struct drm_format_info *info = drm_get_format_info(dev, mode); struct drm_framebuffer *fb; int ret; - if (drm_format_num_planes(mode->pixel_format) != 1) + if (info->num_planes != 1) return ERR_PTR(-EINVAL); fb = kzalloc(sizeof(*fb), GFP_KERNEL); @@ -88,6 +89,7 @@ struct drm_framebuffer *mtk_drm_mode_fb_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *cmd) { + const struct drm_format_info *info = drm_get_format_info(dev, cmd); struct drm_framebuffer *fb; struct drm_gem_object *gem; unsigned int width = cmd->width; @@ -95,7 +97,7 @@ struct drm_framebuffer *mtk_drm_mode_fb_create(struct drm_device *dev, unsigned int size, bpp; int ret; - if (drm_format_num_planes(cmd->pixel_format) != 1) + if (info->num_planes != 1) return ERR_PTR(-EINVAL); gem = drm_gem_object_lookup(file, cmd->handles[0]); diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c index bdbf925ff3e8..fb8515b2860c 100644 --- a/drivers/gpu/drm/meson/meson_overlay.c +++ b/drivers/gpu/drm/meson/meson_overlay.c @@ -458,7 +458,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, } /* Update Canvas with buffer address */ - priv->viu.vd1_planes = drm_format_num_planes(fb->format->format); + priv->viu.vd1_planes = fb->format->num_planes; switch (priv->viu.vd1_planes) { case 3: diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index f59fe1a9f4b9..c3d491e8d44b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -1040,10 +1040,11 @@ int dpu_format_check_modified_format( const struct drm_mode_fb_cmd2 *cmd, struct drm_gem_object **bos) { - int ret, i, num_base_fmt_planes; + const struct drm_format_info *info; const struct dpu_format *fmt; struct dpu_hw_fmt_layout layout; uint32_t bos_total_size = 0; + int ret, i; if (!msm_fmt || !cmd || !bos) { DRM_ERROR("invalid arguments\n"); @@ -1051,14 +1052,16 @@ int dpu_format_check_modified_format( } fmt = to_dpu_format(msm_fmt); - num_base_fmt_planes = drm_format_num_planes(fmt->base.pixel_format); + info = drm_format_info(fmt->base.pixel_format); + if (!info) + return -EINVAL; ret = dpu_format_get_plane_sizes(fmt, cmd->width, cmd->height, &layout, cmd->pitches); if (ret) return ret; - for (i = 0; i < num_base_fmt_planes; i++) { + for (i = 0; i < info->num_planes; i++) { if (!bos[i]) { DRM_ERROR("invalid handle for plane %d\n", i); return -EINVAL; diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c index 6153514db04c..72ab8d89efa4 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c @@ -127,13 +127,14 @@ uint32_t mdp5_smp_calculate(struct mdp5_smp *smp, const struct mdp_format *format, u32 width, bool hdecim) { + const struct drm_format_info *info = drm_format_info(format->base.pixel_format); struct mdp5_kms *mdp5_kms = get_kms(smp); int rev = mdp5_cfg_get_hw_rev(mdp5_kms->cfg); int i, hsub, nplanes, nlines; u32 fmt = format->base.pixel_format; uint32_t blkcfg = 0; - nplanes = drm_format_num_planes(fmt); + nplanes = info->num_planes; hsub = drm_format_horz_chroma_subsampling(fmt); /* different if BWC (compressed framebuffer?) enabled: */ diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c index 136058978e0f..432beddafb9e 100644 --- a/drivers/gpu/drm/msm/msm_fb.c +++ b/drivers/gpu/drm/msm/msm_fb.c @@ -106,9 +106,11 @@ const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb) struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd) { + const struct drm_format_info *info = drm_get_format_info(dev, + mode_cmd); struct drm_gem_object *bos[4] = {0}; struct drm_framebuffer *fb; - int ret, i, n = drm_format_num_planes(mode_cmd->pixel_format); + int ret, i, n = info->num_planes; for (i = 0; i < n; i++) { bos[i] = drm_gem_object_lookup(file, mode_cmd->handles[i]); @@ -135,6 +137,8 @@ struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, static struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos) { + const struct drm_format_info *info = drm_get_format_info(dev, + mode_cmd); struct msm_drm_private *priv = dev->dev_private; struct msm_kms *kms = priv->kms; struct msm_framebuffer *msm_fb = NULL; @@ -147,7 +151,7 @@ static struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev, dev, mode_cmd, mode_cmd->width, mode_cmd->height, (char *)&mode_cmd->pixel_format); - n = drm_format_num_planes(mode_cmd->pixel_format); + n = info->num_planes; hsub = drm_format_horz_chroma_subsampling(mode_cmd->pixel_format); vsub = drm_format_vert_chroma_subsampling(mode_cmd->pixel_format); diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 4f8eb9d08f99..cfb641363a32 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -298,7 +298,9 @@ void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m) struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd) { - unsigned int num_planes = drm_format_num_planes(mode_cmd->pixel_format); + const struct drm_format_info *info = drm_get_format_info(dev, + mode_cmd); + unsigned int num_planes = info->num_planes; struct drm_gem_object *bos[4]; struct drm_framebuffer *fb; int i; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c index 97438bbbe389..606d176d5d96 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c @@ -74,19 +74,19 @@ static struct drm_framebuffer * rockchip_user_fb_create(struct drm_device *dev, struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd) { + const struct drm_format_info *info = drm_get_format_info(dev, + mode_cmd); struct drm_framebuffer *fb; struct drm_gem_object *objs[ROCKCHIP_MAX_FB_BUFFER]; struct drm_gem_object *obj; unsigned int hsub; unsigned int vsub; - int num_planes; + int num_planes = min_t(int, info->num_planes, ROCKCHIP_MAX_FB_BUFFER); int ret; int i; hsub = drm_format_horz_chroma_subsampling(mode_cmd->pixel_format); vsub = drm_format_vert_chroma_subsampling(mode_cmd->pixel_format); - num_planes = min(drm_format_num_planes(mode_cmd->pixel_format), - ROCKCHIP_MAX_FB_BUFFER); for (i = 0; i < num_planes; i++) { unsigned int width = mode_cmd->width / (i ? hsub : 1); diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c index 1dd83a757dba..da0747e317b7 100644 --- a/drivers/gpu/drm/tegra/fb.c +++ b/drivers/gpu/drm/tegra/fb.c @@ -131,6 +131,7 @@ struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, struct drm_file *file, const struct drm_mode_fb_cmd2 *cmd) { + const struct drm_format_info *info = drm_get_format_info(drm, cmd); unsigned int hsub, vsub, i; struct tegra_bo *planes[4]; struct drm_gem_object *gem; @@ -140,7 +141,7 @@ struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, hsub = drm_format_horz_chroma_subsampling(cmd->pixel_format); vsub = drm_format_vert_chroma_subsampling(cmd->pixel_format); - for (i = 0; i < drm_format_num_planes(cmd->pixel_format); i++) { + for (i = 0; i < info->num_planes; i++) { unsigned int width = cmd->width / (i ? hsub : 1); unsigned int height = cmd->height / (i ? vsub : 1); unsigned int size, bpp; diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 4d918d3e4858..e3c0a350cb77 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -592,7 +592,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, u32 ctl0_offset = vc4_state->dlist_count; const struct hvs_format *format = vc4_get_hvs_format(fb->format->format); u64 base_format_mod = fourcc_mod_broadcom_mod(fb->modifier); - int num_planes = drm_format_num_planes(format->drm); + int num_planes = fb->format->num_planes; u32 h_subsample, v_subsample; bool mix_plane_alpha; bool covers_screen; diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c index 83d236fd893c..c6a8be444300 100644 --- a/drivers/gpu/drm/zte/zx_plane.c +++ b/drivers/gpu/drm/zte/zx_plane.c @@ -199,7 +199,6 @@ static void zx_vl_plane_atomic_update(struct drm_plane *plane, u32 dst_x, dst_y, dst_w, dst_h; uint32_t format; int fmt; - int num_planes; int i; if (!fb) @@ -218,9 +217,8 @@ static void zx_vl_plane_atomic_update(struct drm_plane *plane, dst_h = drm_rect_height(dst); /* Set up data address registers for Y, Cb and Cr planes */ - num_planes = drm_format_num_planes(format); paddr_reg = layer + VL_Y; - for (i = 0; i < num_planes; i++) { + for (i = 0; i < fb->format->num_planes; i++) { cma_obj = drm_fb_cma_get_gem_obj(fb, i); paddr = cma_obj->paddr + fb->offsets[i]; paddr += src_y * fb->pitches[i]; diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h index b3d9d88ab290..41779b327d91 100644 --- a/include/drm/drm_fourcc.h +++ b/include/drm/drm_fourcc.h @@ -268,7 +268,6 @@ drm_get_format_info(struct drm_device *dev, uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth); uint32_t drm_driver_legacy_fb_format(struct drm_device *dev, uint32_t bpp, uint32_t depth); -int drm_format_num_planes(uint32_t format); int drm_format_plane_cpp(uint32_t format, int plane); int drm_format_horz_chroma_subsampling(uint32_t format); int drm_format_vert_chroma_subsampling(uint32_t format); -- git-series 0.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: [PATCH v3 2/7] drm: Remove users of drm_format_num_planes Date: Thu, 16 May 2019 12:31:47 +0200 Message-ID: <5ffcec9d14a50ed538e37d565f546802452ee672.1558002671.git-series.maxime.ripard@bootlin.com> References: <27b0041c7977402df4a087c78d2849ffe51c9f1c.1558002671.git-series.maxime.ripard@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by gabe.freedesktop.org (Postfix) with ESMTPS id 110268931F for ; Thu, 16 May 2019 10:32:04 +0000 (UTC) In-Reply-To: <27b0041c7977402df4a087c78d2849ffe51c9f1c.1558002671.git-series.maxime.ripard@bootlin.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Daniel Vetter , David Airlie , Maarten Lankhorst , Sean Paul , Maxime Ripard Cc: Paul Kocialkowski , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Emil Velikov List-Id: dri-devel@lists.freedesktop.org ZHJtX2Zvcm1hdF9udW1fcGxhbmVzKCkgaXMgYmFzaWNhbGx5IGEgbG9va3VwIGluIHRoZSBkcm1f Zm9ybWF0X2luZm8gdGFibGUKcGx1cyBhbiBhY2Nlc3MgdG8gdGhlIG51bV9wbGFuZXMgZmllbGQg b2YgdGhlIGFwcHJvcHJpYXRlIGVudHJ5LgoKTW9zdCBkcml2ZXJzIGFyZSB1c2luZyB0aGlzIGZ1 bmN0aW9uIHdoaWxlIGhhdmluZyBhY2Nlc3MgdG8gdGhlIGVudHJ5CmFscmVhZHksIHdoaWNoIG1l YW5zIHRoYXQgd2Ugd2lsbCBwZXJmb3JtIGFuIHVubmVjZXNzYXJ5IGxvb2t1cC4gUmVtb3ZpbmcK dGhlIGNhbGwgdG8gZHJtX2Zvcm1hdF9udW1fcGxhbmVzIGlzIHRoZXJlZm9yZSBtb3JlIGVmZmlj aWVudC4KClNvbWUgZHJpdmVycyB3aWxsIG5vdCBoYXZlIGFjY2VzcyB0byB0aGF0IGVudHJ5IGlu IHRoZSBmdW5jdGlvbiwgYnV0IGluCnRoaXMgY2FzZSB0aGUgb3ZlcmhlYWQgaXMgbWluaW1hbCAo d2UganVzdCBoYXZlIHRvIGNhbGwgZHJtX2Zvcm1hdF9pbmZvKCkKdG8gcGVyZm9ybSB0aGUgbG9v a3VwKSBhbmQgd2UgY2FuIGV2ZW4gYXZvaWQgbXVsdGlwbGUsIGluZWZmaWNpZW50IGxvb2t1cHMK aW4gc29tZSBwbGFjZXMgdGhhdCBuZWVkIG11bHRpcGxlIGZpZWxkcyBmcm9tIHRoZSBkcm1fZm9y bWF0X2luZm8Kc3RydWN0dXJlLgoKUmV2aWV3ZWQtYnk6IEVtaWwgVmVsaWtvdiA8ZW1pbC52ZWxp a292QGNvbGxhYm9yYS5jb20+ClJldmlld2VkLWJ5OiBQYXVsIEtvY2lhbGtvd3NraSA8cGF1bC5r b2NpYWxrb3dza2lAYm9vdGxpbi5jb20+ClNpZ25lZC1vZmYtYnk6IE1heGltZSBSaXBhcmQgPG1h eGltZS5yaXBhcmRAYm9vdGxpbi5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2FybS9tYWxpZHBf bXcuYyAgICAgICAgICAgICB8ICAyICstCiBkcml2ZXJzL2dwdS9kcm0vYXJtYWRhL2FybWFkYV9m Yi5jICAgICAgICAgIHwgIDMgKystCiBkcml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5jICAgICAg ICAgICAgICAgIHwgMTYgLS0tLS0tLS0tLS0tLS0tLQogZHJpdmVycy9ncHUvZHJtL21lZGlhdGVr L210a19kcm1fZmIuYyAgICAgICB8ICA2ICsrKystLQogZHJpdmVycy9ncHUvZHJtL21lc29uL21l c29uX292ZXJsYXkuYyAgICAgICB8ICAyICstCiBkcml2ZXJzL2dwdS9kcm0vbXNtL2Rpc3AvZHB1 MS9kcHVfZm9ybWF0cy5jIHwgIDkgKysrKysrLS0tCiBkcml2ZXJzL2dwdS9kcm0vbXNtL2Rpc3Av bWRwNS9tZHA1X3NtcC5jICAgIHwgIDMgKystCiBkcml2ZXJzL2dwdS9kcm0vbXNtL21zbV9mYi5j ICAgICAgICAgICAgICAgIHwgIDggKysrKysrLS0KIGRyaXZlcnMvZ3B1L2RybS9vbWFwZHJtL29t YXBfZmIuYyAgICAgICAgICAgfCAgNCArKystCiBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9j a2NoaXBfZHJtX2ZiLmMgIHwgIDYgKysrLS0tCiBkcml2ZXJzL2dwdS9kcm0vdGVncmEvZmIuYyAg ICAgICAgICAgICAgICAgIHwgIDMgKystCiBkcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9wbGFuZS5j ICAgICAgICAgICAgIHwgIDIgKy0KIGRyaXZlcnMvZ3B1L2RybS96dGUvenhfcGxhbmUuYyAgICAg ICAgICAgICAgfCAgNCArLS0tCiBpbmNsdWRlL2RybS9kcm1fZm91cmNjLmggICAgICAgICAgICAg ICAgICAgIHwgIDEgLQogMTQgZmlsZXMgY2hhbmdlZCwgMzIgaW5zZXJ0aW9ucygrKSwgMzcgZGVs ZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2FybS9tYWxpZHBfbXcuYyBi L2RyaXZlcnMvZ3B1L2RybS9hcm0vbWFsaWRwX213LmMKaW5kZXggNWYxMDJiZGFmODQxLi4yZTgx MjUyNTAyNWQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9hcm0vbWFsaWRwX213LmMKKysr IGIvZHJpdmVycy9ncHUvZHJtL2FybS9tYWxpZHBfbXcuYwpAQCAtMTU4LDcgKzE1OCw3IEBAIG1h bGlkcF9td19lbmNvZGVyX2F0b21pY19jaGVjayhzdHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIs CiAJCXJldHVybiAtRUlOVkFMOwogCX0KIAotCW5fcGxhbmVzID0gZHJtX2Zvcm1hdF9udW1fcGxh bmVzKGZiLT5mb3JtYXQtPmZvcm1hdCk7CisJbl9wbGFuZXMgPSBmYi0+Zm9ybWF0LT5udW1fcGxh bmVzOwogCWZvciAoaSA9IDA7IGkgPCBuX3BsYW5lczsgaSsrKSB7CiAJCXN0cnVjdCBkcm1fZ2Vt X2NtYV9vYmplY3QgKm9iaiA9IGRybV9mYl9jbWFfZ2V0X2dlbV9vYmooZmIsIGkpOwogCQkvKiBt ZW1vcnkgd3JpdGUgYnVmZmVycyBhcmUgbmV2ZXIgcm90YXRlZCAqLwpkaWZmIC0tZ2l0IGEvZHJp dmVycy9ncHUvZHJtL2FybWFkYS9hcm1hZGFfZmIuYyBiL2RyaXZlcnMvZ3B1L2RybS9hcm1hZGEv YXJtYWRhX2ZiLmMKaW5kZXggMDU4YWM3ZDk5MjBmLi5hMmY2NDcyZWI0ODIgMTAwNjQ0Ci0tLSBh L2RyaXZlcnMvZ3B1L2RybS9hcm1hZGEvYXJtYWRhX2ZiLmMKKysrIGIvZHJpdmVycy9ncHUvZHJt L2FybWFkYS9hcm1hZGFfZmIuYwpAQCAtODcsNiArODcsNyBAQCBzdHJ1Y3QgYXJtYWRhX2ZyYW1l YnVmZmVyICphcm1hZGFfZnJhbWVidWZmZXJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYs CiBzdHJ1Y3QgZHJtX2ZyYW1lYnVmZmVyICphcm1hZGFfZmJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2 aWNlICpkZXYsCiAJc3RydWN0IGRybV9maWxlICpkZmlsZSwgY29uc3Qgc3RydWN0IGRybV9tb2Rl X2ZiX2NtZDIgKm1vZGUpCiB7CisJY29uc3Qgc3RydWN0IGRybV9mb3JtYXRfaW5mbyAqaW5mbyA9 IGRybV9nZXRfZm9ybWF0X2luZm8oZGV2LCBtb2RlKTsKIAlzdHJ1Y3QgYXJtYWRhX2dlbV9vYmpl Y3QgKm9iajsKIAlzdHJ1Y3QgYXJtYWRhX2ZyYW1lYnVmZmVyICpkZmI7CiAJaW50IHJldDsKQEAg LTk3LDcgKzk4LDcgQEAgc3RydWN0IGRybV9mcmFtZWJ1ZmZlciAqYXJtYWRhX2ZiX2NyZWF0ZShz dHJ1Y3QgZHJtX2RldmljZSAqZGV2LAogCQltb2RlLT5waXRjaGVzWzJdKTsKIAogCS8qIFdlIGNh biBvbmx5IGhhbmRsZSBhIHNpbmdsZSBwbGFuZSBhdCB0aGUgbW9tZW50ICovCi0JaWYgKGRybV9m b3JtYXRfbnVtX3BsYW5lcyhtb2RlLT5waXhlbF9mb3JtYXQpID4gMSAmJgorCWlmIChpbmZvLT5u dW1fcGxhbmVzID4gMSAmJgogCSAgICAobW9kZS0+aGFuZGxlc1swXSAhPSBtb2RlLT5oYW5kbGVz WzFdIHx8CiAJICAgICBtb2RlLT5oYW5kbGVzWzBdICE9IG1vZGUtPmhhbmRsZXNbMl0pKSB7CiAJ CXJldCA9IC1FSU5WQUw7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5j IGIvZHJpdmVycy9ncHUvZHJtL2RybV9mb3VyY2MuYwppbmRleCA2ZWE1NWZiNDUyNmQuLjg3M2Mw MDAxZDhjOCAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2RybV9mb3VyY2MuYworKysgYi9k cml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5jCkBAIC0zMzMsMjIgKzMzMyw2IEBAIGRybV9nZXRf Zm9ybWF0X2luZm8oc3RydWN0IGRybV9kZXZpY2UgKmRldiwKIEVYUE9SVF9TWU1CT0woZHJtX2dl dF9mb3JtYXRfaW5mbyk7CiAKIC8qKgotICogZHJtX2Zvcm1hdF9udW1fcGxhbmVzIC0gZ2V0IHRo ZSBudW1iZXIgb2YgcGxhbmVzIGZvciBmb3JtYXQKLSAqIEBmb3JtYXQ6IHBpeGVsIGZvcm1hdCAo RFJNX0ZPUk1BVF8qKQotICoKLSAqIFJldHVybnM6Ci0gKiBUaGUgbnVtYmVyIG9mIHBsYW5lcyB1 c2VkIGJ5IHRoZSBzcGVjaWZpZWQgcGl4ZWwgZm9ybWF0LgotICovCi1pbnQgZHJtX2Zvcm1hdF9u dW1fcGxhbmVzKHVpbnQzMl90IGZvcm1hdCkKLXsKLQljb25zdCBzdHJ1Y3QgZHJtX2Zvcm1hdF9p bmZvICppbmZvOwotCi0JaW5mbyA9IGRybV9mb3JtYXRfaW5mbyhmb3JtYXQpOwotCXJldHVybiBp bmZvID8gaW5mby0+bnVtX3BsYW5lcyA6IDE7Ci19Ci1FWFBPUlRfU1lNQk9MKGRybV9mb3JtYXRf bnVtX3BsYW5lcyk7Ci0KLS8qKgogICogZHJtX2Zvcm1hdF9wbGFuZV9jcHAgLSBkZXRlcm1pbmUg dGhlIGJ5dGVzIHBlciBwaXhlbCB2YWx1ZQogICogQGZvcm1hdDogcGl4ZWwgZm9ybWF0IChEUk1f Rk9STUFUXyopCiAgKiBAcGxhbmU6IHBsYW5lIGluZGV4CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vbWVkaWF0ZWsvbXRrX2RybV9mYi5jIGIvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210 a19kcm1fZmIuYwppbmRleCBlMjBmY2FlZjI4NTEuLjY4ZmRlZjhiMTJiZCAxMDA2NDQKLS0tIGEv ZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZmIuYworKysgYi9kcml2ZXJzL2dwdS9k cm0vbWVkaWF0ZWsvbXRrX2RybV9mYi5jCkBAIC0zMiwxMCArMzIsMTEgQEAgc3RhdGljIHN0cnVj dCBkcm1fZnJhbWVidWZmZXIgKm10a19kcm1fZnJhbWVidWZmZXJfaW5pdChzdHJ1Y3QgZHJtX2Rl dmljZSAqZGV2LAogCQkJCQljb25zdCBzdHJ1Y3QgZHJtX21vZGVfZmJfY21kMiAqbW9kZSwKIAkJ CQkJc3RydWN0IGRybV9nZW1fb2JqZWN0ICpvYmopCiB7CisJY29uc3Qgc3RydWN0IGRybV9mb3Jt YXRfaW5mbyAqaW5mbyA9IGRybV9nZXRfZm9ybWF0X2luZm8oZGV2LCBtb2RlKTsKIAlzdHJ1Y3Qg ZHJtX2ZyYW1lYnVmZmVyICpmYjsKIAlpbnQgcmV0OwogCi0JaWYgKGRybV9mb3JtYXRfbnVtX3Bs YW5lcyhtb2RlLT5waXhlbF9mb3JtYXQpICE9IDEpCisJaWYgKGluZm8tPm51bV9wbGFuZXMgIT0g MSkKIAkJcmV0dXJuIEVSUl9QVFIoLUVJTlZBTCk7CiAKIAlmYiA9IGt6YWxsb2Moc2l6ZW9mKCpm YiksIEdGUF9LRVJORUwpOwpAQCAtODgsNiArODksNyBAQCBzdHJ1Y3QgZHJtX2ZyYW1lYnVmZmVy ICptdGtfZHJtX21vZGVfZmJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYsCiAJCQkJCSAg ICAgICBzdHJ1Y3QgZHJtX2ZpbGUgKmZpbGUsCiAJCQkJCSAgICAgICBjb25zdCBzdHJ1Y3QgZHJt X21vZGVfZmJfY21kMiAqY21kKQogeworCWNvbnN0IHN0cnVjdCBkcm1fZm9ybWF0X2luZm8gKmlu Zm8gPSBkcm1fZ2V0X2Zvcm1hdF9pbmZvKGRldiwgY21kKTsKIAlzdHJ1Y3QgZHJtX2ZyYW1lYnVm ZmVyICpmYjsKIAlzdHJ1Y3QgZHJtX2dlbV9vYmplY3QgKmdlbTsKIAl1bnNpZ25lZCBpbnQgd2lk dGggPSBjbWQtPndpZHRoOwpAQCAtOTUsNyArOTcsNyBAQCBzdHJ1Y3QgZHJtX2ZyYW1lYnVmZmVy ICptdGtfZHJtX21vZGVfZmJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYsCiAJdW5zaWdu ZWQgaW50IHNpemUsIGJwcDsKIAlpbnQgcmV0OwogCi0JaWYgKGRybV9mb3JtYXRfbnVtX3BsYW5l cyhjbWQtPnBpeGVsX2Zvcm1hdCkgIT0gMSkKKwlpZiAoaW5mby0+bnVtX3BsYW5lcyAhPSAxKQog CQlyZXR1cm4gRVJSX1BUUigtRUlOVkFMKTsKIAogCWdlbSA9IGRybV9nZW1fb2JqZWN0X2xvb2t1 cChmaWxlLCBjbWQtPmhhbmRsZXNbMF0pOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21l c29uL21lc29uX292ZXJsYXkuYyBiL2RyaXZlcnMvZ3B1L2RybS9tZXNvbi9tZXNvbl9vdmVybGF5 LmMKaW5kZXggYmRiZjkyNWZmM2U4Li5mYjg1MTViMjg2MGMgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Z3B1L2RybS9tZXNvbi9tZXNvbl9vdmVybGF5LmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL21lc29u L21lc29uX292ZXJsYXkuYwpAQCAtNDU4LDcgKzQ1OCw3IEBAIHN0YXRpYyB2b2lkIG1lc29uX292 ZXJsYXlfYXRvbWljX3VwZGF0ZShzdHJ1Y3QgZHJtX3BsYW5lICpwbGFuZSwKIAl9CiAKIAkvKiBV cGRhdGUgQ2FudmFzIHdpdGggYnVmZmVyIGFkZHJlc3MgKi8KLQlwcml2LT52aXUudmQxX3BsYW5l cyA9IGRybV9mb3JtYXRfbnVtX3BsYW5lcyhmYi0+Zm9ybWF0LT5mb3JtYXQpOworCXByaXYtPnZp dS52ZDFfcGxhbmVzID0gZmItPmZvcm1hdC0+bnVtX3BsYW5lczsKIAogCXN3aXRjaCAocHJpdi0+ dml1LnZkMV9wbGFuZXMpIHsKIAljYXNlIDM6CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0v bXNtL2Rpc3AvZHB1MS9kcHVfZm9ybWF0cy5jIGIvZHJpdmVycy9ncHUvZHJtL21zbS9kaXNwL2Rw dTEvZHB1X2Zvcm1hdHMuYwppbmRleCBmNTlmZTFhOWY0YjkuLmMzZDQ5MWU4ZDQ0YiAxMDA2NDQK LS0tIGEvZHJpdmVycy9ncHUvZHJtL21zbS9kaXNwL2RwdTEvZHB1X2Zvcm1hdHMuYworKysgYi9k cml2ZXJzL2dwdS9kcm0vbXNtL2Rpc3AvZHB1MS9kcHVfZm9ybWF0cy5jCkBAIC0xMDQwLDEwICsx MDQwLDExIEBAIGludCBkcHVfZm9ybWF0X2NoZWNrX21vZGlmaWVkX2Zvcm1hdCgKIAkJY29uc3Qg c3RydWN0IGRybV9tb2RlX2ZiX2NtZDIgKmNtZCwKIAkJc3RydWN0IGRybV9nZW1fb2JqZWN0ICoq Ym9zKQogewotCWludCByZXQsIGksIG51bV9iYXNlX2ZtdF9wbGFuZXM7CisJY29uc3Qgc3RydWN0 IGRybV9mb3JtYXRfaW5mbyAqaW5mbzsKIAljb25zdCBzdHJ1Y3QgZHB1X2Zvcm1hdCAqZm10Owog CXN0cnVjdCBkcHVfaHdfZm10X2xheW91dCBsYXlvdXQ7CiAJdWludDMyX3QgYm9zX3RvdGFsX3Np emUgPSAwOworCWludCByZXQsIGk7CiAKIAlpZiAoIW1zbV9mbXQgfHwgIWNtZCB8fCAhYm9zKSB7 CiAJCURSTV9FUlJPUigiaW52YWxpZCBhcmd1bWVudHNcbiIpOwpAQCAtMTA1MSwxNCArMTA1Miwx NiBAQCBpbnQgZHB1X2Zvcm1hdF9jaGVja19tb2RpZmllZF9mb3JtYXQoCiAJfQogCiAJZm10ID0g dG9fZHB1X2Zvcm1hdChtc21fZm10KTsKLQludW1fYmFzZV9mbXRfcGxhbmVzID0gZHJtX2Zvcm1h dF9udW1fcGxhbmVzKGZtdC0+YmFzZS5waXhlbF9mb3JtYXQpOworCWluZm8gPSBkcm1fZm9ybWF0 X2luZm8oZm10LT5iYXNlLnBpeGVsX2Zvcm1hdCk7CisJaWYgKCFpbmZvKQorCQlyZXR1cm4gLUVJ TlZBTDsKIAogCXJldCA9IGRwdV9mb3JtYXRfZ2V0X3BsYW5lX3NpemVzKGZtdCwgY21kLT53aWR0 aCwgY21kLT5oZWlnaHQsCiAJCQkmbGF5b3V0LCBjbWQtPnBpdGNoZXMpOwogCWlmIChyZXQpCiAJ CXJldHVybiByZXQ7CiAKLQlmb3IgKGkgPSAwOyBpIDwgbnVtX2Jhc2VfZm10X3BsYW5lczsgaSsr KSB7CisJZm9yIChpID0gMDsgaSA8IGluZm8tPm51bV9wbGFuZXM7IGkrKykgewogCQlpZiAoIWJv c1tpXSkgewogCQkJRFJNX0VSUk9SKCJpbnZhbGlkIGhhbmRsZSBmb3IgcGxhbmUgJWRcbiIsIGkp OwogCQkJcmV0dXJuIC1FSU5WQUw7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vbXNtL2Rp c3AvbWRwNS9tZHA1X3NtcC5jIGIvZHJpdmVycy9ncHUvZHJtL21zbS9kaXNwL21kcDUvbWRwNV9z bXAuYwppbmRleCA2MTUzNTE0ZGIwNGMuLjcyYWI4ZDg5ZWZhNCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9ncHUvZHJtL21zbS9kaXNwL21kcDUvbWRwNV9zbXAuYworKysgYi9kcml2ZXJzL2dwdS9kcm0v bXNtL2Rpc3AvbWRwNS9tZHA1X3NtcC5jCkBAIC0xMjcsMTMgKzEyNywxNCBAQCB1aW50MzJfdCBt ZHA1X3NtcF9jYWxjdWxhdGUoc3RydWN0IG1kcDVfc21wICpzbXAsCiAJCWNvbnN0IHN0cnVjdCBt ZHBfZm9ybWF0ICpmb3JtYXQsCiAJCXUzMiB3aWR0aCwgYm9vbCBoZGVjaW0pCiB7CisJY29uc3Qg c3RydWN0IGRybV9mb3JtYXRfaW5mbyAqaW5mbyA9IGRybV9mb3JtYXRfaW5mbyhmb3JtYXQtPmJh c2UucGl4ZWxfZm9ybWF0KTsKIAlzdHJ1Y3QgbWRwNV9rbXMgKm1kcDVfa21zID0gZ2V0X2ttcyhz bXApOwogCWludCByZXYgPSBtZHA1X2NmZ19nZXRfaHdfcmV2KG1kcDVfa21zLT5jZmcpOwogCWlu dCBpLCBoc3ViLCBucGxhbmVzLCBubGluZXM7CiAJdTMyIGZtdCA9IGZvcm1hdC0+YmFzZS5waXhl bF9mb3JtYXQ7CiAJdWludDMyX3QgYmxrY2ZnID0gMDsKIAotCW5wbGFuZXMgPSBkcm1fZm9ybWF0 X251bV9wbGFuZXMoZm10KTsKKwlucGxhbmVzID0gaW5mby0+bnVtX3BsYW5lczsKIAloc3ViID0g ZHJtX2Zvcm1hdF9ob3J6X2Nocm9tYV9zdWJzYW1wbGluZyhmbXQpOwogCiAJLyogZGlmZmVyZW50 IGlmIEJXQyAoY29tcHJlc3NlZCBmcmFtZWJ1ZmZlcj8pIGVuYWJsZWQ6ICovCmRpZmYgLS1naXQg YS9kcml2ZXJzL2dwdS9kcm0vbXNtL21zbV9mYi5jIGIvZHJpdmVycy9ncHUvZHJtL21zbS9tc21f ZmIuYwppbmRleCAxMzYwNTg5NzhlMGYuLjQzMmJlZGRhZmI5ZSAxMDA2NDQKLS0tIGEvZHJpdmVy cy9ncHUvZHJtL21zbS9tc21fZmIuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vbXNtL21zbV9mYi5j CkBAIC0xMDYsOSArMTA2LDExIEBAIGNvbnN0IHN0cnVjdCBtc21fZm9ybWF0ICptc21fZnJhbWVi dWZmZXJfZm9ybWF0KHN0cnVjdCBkcm1fZnJhbWVidWZmZXIgKmZiKQogc3RydWN0IGRybV9mcmFt ZWJ1ZmZlciAqbXNtX2ZyYW1lYnVmZmVyX2NyZWF0ZShzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LAog CQlzdHJ1Y3QgZHJtX2ZpbGUgKmZpbGUsIGNvbnN0IHN0cnVjdCBkcm1fbW9kZV9mYl9jbWQyICpt b2RlX2NtZCkKIHsKKwljb25zdCBzdHJ1Y3QgZHJtX2Zvcm1hdF9pbmZvICppbmZvID0gZHJtX2dl dF9mb3JtYXRfaW5mbyhkZXYsCisJCQkJCQkJCSBtb2RlX2NtZCk7CiAJc3RydWN0IGRybV9nZW1f b2JqZWN0ICpib3NbNF0gPSB7MH07CiAJc3RydWN0IGRybV9mcmFtZWJ1ZmZlciAqZmI7Ci0JaW50 IHJldCwgaSwgbiA9IGRybV9mb3JtYXRfbnVtX3BsYW5lcyhtb2RlX2NtZC0+cGl4ZWxfZm9ybWF0 KTsKKwlpbnQgcmV0LCBpLCBuID0gaW5mby0+bnVtX3BsYW5lczsKIAogCWZvciAoaSA9IDA7IGkg PCBuOyBpKyspIHsKIAkJYm9zW2ldID0gZHJtX2dlbV9vYmplY3RfbG9va3VwKGZpbGUsIG1vZGVf Y21kLT5oYW5kbGVzW2ldKTsKQEAgLTEzNSw2ICsxMzcsOCBAQCBzdHJ1Y3QgZHJtX2ZyYW1lYnVm ZmVyICptc21fZnJhbWVidWZmZXJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYsCiBzdGF0 aWMgc3RydWN0IGRybV9mcmFtZWJ1ZmZlciAqbXNtX2ZyYW1lYnVmZmVyX2luaXQoc3RydWN0IGRy bV9kZXZpY2UgKmRldiwKIAkJY29uc3Qgc3RydWN0IGRybV9tb2RlX2ZiX2NtZDIgKm1vZGVfY21k LCBzdHJ1Y3QgZHJtX2dlbV9vYmplY3QgKipib3MpCiB7CisJY29uc3Qgc3RydWN0IGRybV9mb3Jt YXRfaW5mbyAqaW5mbyA9IGRybV9nZXRfZm9ybWF0X2luZm8oZGV2LAorCQkJCQkJCQkgbW9kZV9j bWQpOwogCXN0cnVjdCBtc21fZHJtX3ByaXZhdGUgKnByaXYgPSBkZXYtPmRldl9wcml2YXRlOwog CXN0cnVjdCBtc21fa21zICprbXMgPSBwcml2LT5rbXM7CiAJc3RydWN0IG1zbV9mcmFtZWJ1ZmZl ciAqbXNtX2ZiID0gTlVMTDsKQEAgLTE0Nyw3ICsxNTEsNyBAQCBzdGF0aWMgc3RydWN0IGRybV9m cmFtZWJ1ZmZlciAqbXNtX2ZyYW1lYnVmZmVyX2luaXQoc3RydWN0IGRybV9kZXZpY2UgKmRldiwK IAkJCWRldiwgbW9kZV9jbWQsIG1vZGVfY21kLT53aWR0aCwgbW9kZV9jbWQtPmhlaWdodCwKIAkJ CShjaGFyICopJm1vZGVfY21kLT5waXhlbF9mb3JtYXQpOwogCi0JbiA9IGRybV9mb3JtYXRfbnVt X3BsYW5lcyhtb2RlX2NtZC0+cGl4ZWxfZm9ybWF0KTsKKwluID0gaW5mby0+bnVtX3BsYW5lczsK IAloc3ViID0gZHJtX2Zvcm1hdF9ob3J6X2Nocm9tYV9zdWJzYW1wbGluZyhtb2RlX2NtZC0+cGl4 ZWxfZm9ybWF0KTsKIAl2c3ViID0gZHJtX2Zvcm1hdF92ZXJ0X2Nocm9tYV9zdWJzYW1wbGluZyht b2RlX2NtZC0+cGl4ZWxfZm9ybWF0KTsKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL29t YXBkcm0vb21hcF9mYi5jIGIvZHJpdmVycy9ncHUvZHJtL29tYXBkcm0vb21hcF9mYi5jCmluZGV4 IDRmOGViOWQwOGY5OS4uY2ZiNjQxMzYzYTMyIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0v b21hcGRybS9vbWFwX2ZiLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL29tYXBkcm0vb21hcF9mYi5j CkBAIC0yOTgsNyArMjk4LDkgQEAgdm9pZCBvbWFwX2ZyYW1lYnVmZmVyX2Rlc2NyaWJlKHN0cnVj dCBkcm1fZnJhbWVidWZmZXIgKmZiLCBzdHJ1Y3Qgc2VxX2ZpbGUgKm0pCiBzdHJ1Y3QgZHJtX2Zy YW1lYnVmZmVyICpvbWFwX2ZyYW1lYnVmZmVyX2NyZWF0ZShzdHJ1Y3QgZHJtX2RldmljZSAqZGV2 LAogCQlzdHJ1Y3QgZHJtX2ZpbGUgKmZpbGUsIGNvbnN0IHN0cnVjdCBkcm1fbW9kZV9mYl9jbWQy ICptb2RlX2NtZCkKIHsKLQl1bnNpZ25lZCBpbnQgbnVtX3BsYW5lcyA9IGRybV9mb3JtYXRfbnVt X3BsYW5lcyhtb2RlX2NtZC0+cGl4ZWxfZm9ybWF0KTsKKwljb25zdCBzdHJ1Y3QgZHJtX2Zvcm1h dF9pbmZvICppbmZvID0gZHJtX2dldF9mb3JtYXRfaW5mbyhkZXYsCisJCQkJCQkJCSBtb2RlX2Nt ZCk7CisJdW5zaWduZWQgaW50IG51bV9wbGFuZXMgPSBpbmZvLT5udW1fcGxhbmVzOwogCXN0cnVj dCBkcm1fZ2VtX29iamVjdCAqYm9zWzRdOwogCXN0cnVjdCBkcm1fZnJhbWVidWZmZXIgKmZiOwog CWludCBpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2Ry bV9mYi5jIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV9mYi5jCmluZGV4 IDk3NDM4YmJiZTM4OS4uNjA2ZDE3NmQ1ZDk2IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0v cm9ja2NoaXAvcm9ja2NoaXBfZHJtX2ZiLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlw L3JvY2tjaGlwX2RybV9mYi5jCkBAIC03NCwxOSArNzQsMTkgQEAgc3RhdGljIHN0cnVjdCBkcm1f ZnJhbWVidWZmZXIgKgogcm9ja2NoaXBfdXNlcl9mYl9jcmVhdGUoc3RydWN0IGRybV9kZXZpY2Ug KmRldiwgc3RydWN0IGRybV9maWxlICpmaWxlX3ByaXYsCiAJCQljb25zdCBzdHJ1Y3QgZHJtX21v ZGVfZmJfY21kMiAqbW9kZV9jbWQpCiB7CisJY29uc3Qgc3RydWN0IGRybV9mb3JtYXRfaW5mbyAq aW5mbyA9IGRybV9nZXRfZm9ybWF0X2luZm8oZGV2LAorCQkJCQkJCQkgbW9kZV9jbWQpOwogCXN0 cnVjdCBkcm1fZnJhbWVidWZmZXIgKmZiOwogCXN0cnVjdCBkcm1fZ2VtX29iamVjdCAqb2Jqc1tS T0NLQ0hJUF9NQVhfRkJfQlVGRkVSXTsKIAlzdHJ1Y3QgZHJtX2dlbV9vYmplY3QgKm9iajsKIAl1 bnNpZ25lZCBpbnQgaHN1YjsKIAl1bnNpZ25lZCBpbnQgdnN1YjsKLQlpbnQgbnVtX3BsYW5lczsK KwlpbnQgbnVtX3BsYW5lcyA9IG1pbl90KGludCwgaW5mby0+bnVtX3BsYW5lcywgUk9DS0NISVBf TUFYX0ZCX0JVRkZFUik7CiAJaW50IHJldDsKIAlpbnQgaTsKIAogCWhzdWIgPSBkcm1fZm9ybWF0 X2hvcnpfY2hyb21hX3N1YnNhbXBsaW5nKG1vZGVfY21kLT5waXhlbF9mb3JtYXQpOwogCXZzdWIg PSBkcm1fZm9ybWF0X3ZlcnRfY2hyb21hX3N1YnNhbXBsaW5nKG1vZGVfY21kLT5waXhlbF9mb3Jt YXQpOwotCW51bV9wbGFuZXMgPSBtaW4oZHJtX2Zvcm1hdF9udW1fcGxhbmVzKG1vZGVfY21kLT5w aXhlbF9mb3JtYXQpLAotCQkJIFJPQ0tDSElQX01BWF9GQl9CVUZGRVIpOwogCiAJZm9yIChpID0g MDsgaSA8IG51bV9wbGFuZXM7IGkrKykgewogCQl1bnNpZ25lZCBpbnQgd2lkdGggPSBtb2RlX2Nt ZC0+d2lkdGggLyAoaSA/IGhzdWIgOiAxKTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS90 ZWdyYS9mYi5jIGIvZHJpdmVycy9ncHUvZHJtL3RlZ3JhL2ZiLmMKaW5kZXggMWRkODNhNzU3ZGJh Li5kYTA3NDdlMzE3YjcgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS90ZWdyYS9mYi5jCisr KyBiL2RyaXZlcnMvZ3B1L2RybS90ZWdyYS9mYi5jCkBAIC0xMzEsNiArMTMxLDcgQEAgc3RydWN0 IGRybV9mcmFtZWJ1ZmZlciAqdGVncmFfZmJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2aWNlICpkcm0s CiAJCQkJCXN0cnVjdCBkcm1fZmlsZSAqZmlsZSwKIAkJCQkJY29uc3Qgc3RydWN0IGRybV9tb2Rl X2ZiX2NtZDIgKmNtZCkKIHsKKwljb25zdCBzdHJ1Y3QgZHJtX2Zvcm1hdF9pbmZvICppbmZvID0g ZHJtX2dldF9mb3JtYXRfaW5mbyhkcm0sIGNtZCk7CiAJdW5zaWduZWQgaW50IGhzdWIsIHZzdWIs IGk7CiAJc3RydWN0IHRlZ3JhX2JvICpwbGFuZXNbNF07CiAJc3RydWN0IGRybV9nZW1fb2JqZWN0 ICpnZW07CkBAIC0xNDAsNyArMTQxLDcgQEAgc3RydWN0IGRybV9mcmFtZWJ1ZmZlciAqdGVncmFf ZmJfY3JlYXRlKHN0cnVjdCBkcm1fZGV2aWNlICpkcm0sCiAJaHN1YiA9IGRybV9mb3JtYXRfaG9y el9jaHJvbWFfc3Vic2FtcGxpbmcoY21kLT5waXhlbF9mb3JtYXQpOwogCXZzdWIgPSBkcm1fZm9y bWF0X3ZlcnRfY2hyb21hX3N1YnNhbXBsaW5nKGNtZC0+cGl4ZWxfZm9ybWF0KTsKIAotCWZvciAo aSA9IDA7IGkgPCBkcm1fZm9ybWF0X251bV9wbGFuZXMoY21kLT5waXhlbF9mb3JtYXQpOyBpKysp IHsKKwlmb3IgKGkgPSAwOyBpIDwgaW5mby0+bnVtX3BsYW5lczsgaSsrKSB7CiAJCXVuc2lnbmVk IGludCB3aWR0aCA9IGNtZC0+d2lkdGggLyAoaSA/IGhzdWIgOiAxKTsKIAkJdW5zaWduZWQgaW50 IGhlaWdodCA9IGNtZC0+aGVpZ2h0IC8gKGkgPyB2c3ViIDogMSk7CiAJCXVuc2lnbmVkIGludCBz aXplLCBicHA7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9wbGFuZS5jIGIv ZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfcGxhbmUuYwppbmRleCA0ZDkxOGQzZTQ4NTguLmUzYzBh MzUwY2I3NyAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfcGxhbmUuYworKysg Yi9kcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9wbGFuZS5jCkBAIC01OTIsNyArNTkyLDcgQEAgc3Rh dGljIGludCB2YzRfcGxhbmVfbW9kZV9zZXQoc3RydWN0IGRybV9wbGFuZSAqcGxhbmUsCiAJdTMy IGN0bDBfb2Zmc2V0ID0gdmM0X3N0YXRlLT5kbGlzdF9jb3VudDsKIAljb25zdCBzdHJ1Y3QgaHZz X2Zvcm1hdCAqZm9ybWF0ID0gdmM0X2dldF9odnNfZm9ybWF0KGZiLT5mb3JtYXQtPmZvcm1hdCk7 CiAJdTY0IGJhc2VfZm9ybWF0X21vZCA9IGZvdXJjY19tb2RfYnJvYWRjb21fbW9kKGZiLT5tb2Rp Zmllcik7Ci0JaW50IG51bV9wbGFuZXMgPSBkcm1fZm9ybWF0X251bV9wbGFuZXMoZm9ybWF0LT5k cm0pOworCWludCBudW1fcGxhbmVzID0gZmItPmZvcm1hdC0+bnVtX3BsYW5lczsKIAl1MzIgaF9z dWJzYW1wbGUsIHZfc3Vic2FtcGxlOwogCWJvb2wgbWl4X3BsYW5lX2FscGhhOwogCWJvb2wgY292 ZXJzX3NjcmVlbjsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS96dGUvenhfcGxhbmUuYyBi L2RyaXZlcnMvZ3B1L2RybS96dGUvenhfcGxhbmUuYwppbmRleCA4M2QyMzZmZDg5M2MuLmM2YThi ZTQ0NDMwMCAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL3p0ZS96eF9wbGFuZS5jCisrKyBi L2RyaXZlcnMvZ3B1L2RybS96dGUvenhfcGxhbmUuYwpAQCAtMTk5LDcgKzE5OSw2IEBAIHN0YXRp YyB2b2lkIHp4X3ZsX3BsYW5lX2F0b21pY191cGRhdGUoc3RydWN0IGRybV9wbGFuZSAqcGxhbmUs CiAJdTMyIGRzdF94LCBkc3RfeSwgZHN0X3csIGRzdF9oOwogCXVpbnQzMl90IGZvcm1hdDsKIAlp bnQgZm10OwotCWludCBudW1fcGxhbmVzOwogCWludCBpOwogCiAJaWYgKCFmYikKQEAgLTIxOCw5 ICsyMTcsOCBAQCBzdGF0aWMgdm9pZCB6eF92bF9wbGFuZV9hdG9taWNfdXBkYXRlKHN0cnVjdCBk cm1fcGxhbmUgKnBsYW5lLAogCWRzdF9oID0gZHJtX3JlY3RfaGVpZ2h0KGRzdCk7CiAKIAkvKiBT ZXQgdXAgZGF0YSBhZGRyZXNzIHJlZ2lzdGVycyBmb3IgWSwgQ2IgYW5kIENyIHBsYW5lcyAqLwot CW51bV9wbGFuZXMgPSBkcm1fZm9ybWF0X251bV9wbGFuZXMoZm9ybWF0KTsKIAlwYWRkcl9yZWcg PSBsYXllciArIFZMX1k7Ci0JZm9yIChpID0gMDsgaSA8IG51bV9wbGFuZXM7IGkrKykgeworCWZv ciAoaSA9IDA7IGkgPCBmYi0+Zm9ybWF0LT5udW1fcGxhbmVzOyBpKyspIHsKIAkJY21hX29iaiA9 IGRybV9mYl9jbWFfZ2V0X2dlbV9vYmooZmIsIGkpOwogCQlwYWRkciA9IGNtYV9vYmotPnBhZGRy ICsgZmItPm9mZnNldHNbaV07CiAJCXBhZGRyICs9IHNyY195ICogZmItPnBpdGNoZXNbaV07CmRp ZmYgLS1naXQgYS9pbmNsdWRlL2RybS9kcm1fZm91cmNjLmggYi9pbmNsdWRlL2RybS9kcm1fZm91 cmNjLmgKaW5kZXggYjNkOWQ4OGFiMjkwLi40MTc3OWIzMjdkOTEgMTAwNjQ0Ci0tLSBhL2luY2x1 ZGUvZHJtL2RybV9mb3VyY2MuaAorKysgYi9pbmNsdWRlL2RybS9kcm1fZm91cmNjLmgKQEAgLTI2 OCw3ICsyNjgsNiBAQCBkcm1fZ2V0X2Zvcm1hdF9pbmZvKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYs CiB1aW50MzJfdCBkcm1fbW9kZV9sZWdhY3lfZmJfZm9ybWF0KHVpbnQzMl90IGJwcCwgdWludDMy X3QgZGVwdGgpOwogdWludDMyX3QgZHJtX2RyaXZlcl9sZWdhY3lfZmJfZm9ybWF0KHN0cnVjdCBk cm1fZGV2aWNlICpkZXYsCiAJCQkJICAgICB1aW50MzJfdCBicHAsIHVpbnQzMl90IGRlcHRoKTsK LWludCBkcm1fZm9ybWF0X251bV9wbGFuZXModWludDMyX3QgZm9ybWF0KTsKIGludCBkcm1fZm9y bWF0X3BsYW5lX2NwcCh1aW50MzJfdCBmb3JtYXQsIGludCBwbGFuZSk7CiBpbnQgZHJtX2Zvcm1h dF9ob3J6X2Nocm9tYV9zdWJzYW1wbGluZyh1aW50MzJfdCBmb3JtYXQpOwogaW50IGRybV9mb3Jt YXRfdmVydF9jaHJvbWFfc3Vic2FtcGxpbmcodWludDMyX3QgZm9ybWF0KTsKLS0gCmdpdC1zZXJp ZXMgMC45LjEKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K ZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0 dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVs