> Weiwei Li <liweiwei@iscas.ac.cn> 於 2022年4月27日 下午7:55 寫道：
> 
> 
> 在 2022/3/7 下午3:10, ~eopxd 写道:
>> From: eopXD <eop.chen@sifive.com>
>> 
>> Destination register of unit-stride mask load and store instructions are
>> always written with a tail-agnostic policy.
>> 
>> Signed-off-by: eop Chen <eop.chen@sifive.com>
>> Reviewed-by: Frank Chang <frank.chang@sifive.com>
>> ---
>>  target/riscv/insn_trans/trans_rvv.c.inc | 11 ++++++++++
>>  target/riscv/vector_helper.c            | 28 +++++++++++++++++++++++++
>>  2 files changed, 39 insertions(+)
>> 
>> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
>> index cc80bf00ff..99691f1b9f 100644
>> --- a/target/riscv/insn_trans/trans_rvv.c.inc
>> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
>> @@ -711,6 +711,7 @@ static bool ld_us_op(DisasContext *s, arg_r2nfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      return ldst_us_trans(a->rd, a->rs1, data, fn, s, false);
>>  }
>>  @@ -748,6 +749,7 @@ static bool st_us_op(DisasContext *s, arg_r2nfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      return ldst_us_trans(a->rd, a->rs1, data, fn, s, true);
>>  }
>>  @@ -774,6 +776,8 @@ static bool ld_us_mask_op(DisasContext *s, arg_vlm_v *a, uint8_t eew)
>>      /* EMUL = 1, NFIELDS = 1 */
>>      data = FIELD_DP32(data, VDATA, LMUL, 0);
>>      data = FIELD_DP32(data, VDATA, NF, 1);
>> +    /* Mask destination register are always tail-agnostic */
>> +    data = FIELD_DP32(data, VDATA, VTA, s->cfg_vta_all_1s);
>>      return ldst_us_trans(a->rd, a->rs1, data, fn, s, false);
>>  }
>>  @@ -791,6 +795,8 @@ static bool st_us_mask_op(DisasContext *s, arg_vsm_v *a, uint8_t eew)
>>      /* EMUL = 1, NFIELDS = 1 */
>>      data = FIELD_DP32(data, VDATA, LMUL, 0);
>>      data = FIELD_DP32(data, VDATA, NF, 1);
>> +    /* Mask destination register are always tail-agnostic */
>> +    data = FIELD_DP32(data, VDATA, VTA, s->cfg_vta_all_1s);
>>      return ldst_us_trans(a->rd, a->rs1, data, fn, s, true);
>>  }
>>  @@ -862,6 +868,7 @@ static bool ld_stride_op(DisasContext *s, arg_rnfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      return ldst_stride_trans(a->rd, a->rs1, a->rs2, data, fn, s, false);
>>  }
>>  @@ -891,6 +898,7 @@ static bool st_stride_op(DisasContext *s, arg_rnfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      fn = fns[eew];
>>      if (fn == NULL) {
>>          return false;
>> @@ -991,6 +999,7 @@ static bool ld_index_op(DisasContext *s, arg_rnfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      return ldst_index_trans(a->rd, a->rs1, a->rs2, data, fn, s, false);
>>  }
>>  @@ -1043,6 +1052,7 @@ static bool st_index_op(DisasContext *s, arg_rnfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      return ldst_index_trans(a->rd, a->rs1, a->rs2, data, fn, s, true);
>>  }
>>  @@ -1108,6 +1118,7 @@ static bool ldff_op(DisasContext *s, arg_r2nfvm *a, uint8_t eew)
>>      data = FIELD_DP32(data, VDATA, VM, a->vm);
>>      data = FIELD_DP32(data, VDATA, LMUL, emul);
>>      data = FIELD_DP32(data, VDATA, NF, a->nf);
>> +    data = FIELD_DP32(data, VDATA, VTA, s->vta);
>>      return ldff_trans(a->rd, a->rs1, data, fn, s);
>>  }
>>  diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
>> index 396e252179..1541d97b08 100644
>> --- a/target/riscv/vector_helper.c
>> +++ b/target/riscv/vector_helper.c
>> @@ -270,6 +270,8 @@ vext_ldst_stride(void *vd, void *v0, target_ulong base,
>>      uint32_t i, k;
>>      uint32_t nf = vext_nf(desc);
>>      uint32_t max_elems = vext_max_elems(desc, log2_esz);
>> +    uint32_t esz = 1 << log2_esz;
>> +    uint32_t vta = vext_vta(desc);
>>        for (i = env->vstart; i < env->vl; i++, env->vstart++) {
>>          if (!vm && !vext_elem_mask(v0, i)) {
>> @@ -284,6 +286,11 @@ vext_ldst_stride(void *vd, void *v0, target_ulong base,
>>          }
>>      }
>>      env->vstart = 0;
>> +    /* set tail elements to 1s */
>> +    for (k = 0; k < nf; ++k) {
>> +        vext_set_elems_1s(vd, vta, env->vl * esz + k * max_elems,
>> +                          max_elems * esz + k * max_elems);
>> +    }
>>  }
> 
> It seems incorrect here. I think it should be  k * max_elems * esz. The same to following similar case.
> 
> Otherwise, this patchset looks good to me.
> 
> Reviewed-by: Weiwei Li<liweiwei@iscas.ac.cn>
> 
> Regards,
> Weiwei Li
> 

I have just sent a new version to correct this.
Thank you for your patient review.

Regards,

eop Chen