From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, laurent@vivier.eu
Subject: Re: [PATCH v3 7/8] accel/tcg: Move PageDesc tree into tb-maint.c for system
Date: Mon, 12 Dec 2022 09:28:43 -0600 [thread overview]
Message-ID: <6006a739-9474-4c27-c42e-b642a957e346@linaro.org> (raw)
In-Reply-To: <953275ef-a900-0a44-d2a4-1d990a1522a8@linaro.org>
On 12/9/22 01:22, Philippe Mathieu-Daudé wrote:
> On 9/12/22 06:19, Richard Henderson wrote:
>> Now that PageDesc is not used for user-only, and for system
>> it is only used for tb maintenance, move the implementation
>> into tb-main.c appropriately ifdefed.
>>
>> We have not yet eliminated all references to PageDesc for
>> user-only, so retain a typedef to the structure without definition.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> accel/tcg/internal.h | 49 +++-----------
>> accel/tcg/tb-maint.c | 130 ++++++++++++++++++++++++++++++++++++--
>> accel/tcg/translate-all.c | 95 ----------------------------
>> 3 files changed, 134 insertions(+), 140 deletions(-)
>
>
>> -/*
>> - * In system mode we want L1_MAP to be based on ram offsets,
>> - * while in user mode we want it to be based on virtual addresses.
>> - *
>> - * TODO: For user mode, see the caveat re host vs guest virtual
>> - * address spaces near GUEST_ADDR_MAX.
>> - */
>> -#if !defined(CONFIG_USER_ONLY)
>> -#if HOST_LONG_BITS < TARGET_PHYS_ADDR_SPACE_BITS
>> -# define L1_MAP_ADDR_SPACE_BITS HOST_LONG_BITS
>> -#else
>> -# define L1_MAP_ADDR_SPACE_BITS TARGET_PHYS_ADDR_SPACE_BITS
>> -#endif
>> -#else
>> -# define L1_MAP_ADDR_SPACE_BITS MIN(HOST_LONG_BITS, TARGET_ABI_BITS)
>> -#endif
>
>
>> diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
>> index 20e86c813d..9b996bbeb2 100644
>> --- a/accel/tcg/tb-maint.c
>> +++ b/accel/tcg/tb-maint.c
>> @@ -127,6 +127,121 @@ static PageForEachNext foreach_tb_next(PageForEachNext tb,
>> }
>> #else
>> +/*
>> + * In system mode we want L1_MAP to be based on ram offsets.
>> + */
>> +#if HOST_LONG_BITS < TARGET_PHYS_ADDR_SPACE_BITS
>> +# define L1_MAP_ADDR_SPACE_BITS HOST_LONG_BITS
>> +#else
>> +# define L1_MAP_ADDR_SPACE_BITS TARGET_PHYS_ADDR_SPACE_BITS
>> +#endif
> So you removed L1_MAP_ADDR_SPACE_BITS in this patch. If you ever respin,
> I'd rather have it cleaned in the previous patch, along with the comment
> updated and TODO removed.
I don't agree. I move all of the PageDesc symbols together in this patch. I think that
it would get in the way of the main point of the previous patch.
r~
next prev parent reply other threads:[~2022-12-12 15:29 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-09 5:19 [PATCH v3 0/8] accel/tcg: Rewrite user-only vma tracking Richard Henderson
2022-12-09 5:19 ` [PATCH v3 1/8] util: Add interval-tree.c Richard Henderson
2022-12-09 8:35 ` Philippe Mathieu-Daudé
2022-12-09 5:19 ` [PATCH v3 2/8] accel/tcg: Rename page_flush_tb Richard Henderson
2022-12-09 7:09 ` Philippe Mathieu-Daudé
2022-12-16 11:52 ` Alex Bennée
2022-12-09 5:19 ` [PATCH v3 3/8] accel/tcg: Use interval tree for TBs in user-only mode Richard Henderson
2022-12-09 5:19 ` [PATCH v3 4/8] accel/tcg: Use interval tree for TARGET_PAGE_DATA_SIZE Richard Henderson
2022-12-16 11:59 ` Alex Bennée
2022-12-09 5:19 ` [PATCH v3 5/8] accel/tcg: Move page_{get,set}_flags to user-exec.c Richard Henderson
2022-12-09 7:13 ` Philippe Mathieu-Daudé
2022-12-09 5:19 ` [PATCH v3 6/8] accel/tcg: Use interval tree for user-only page tracking Richard Henderson
2022-12-09 7:18 ` Philippe Mathieu-Daudé
2022-12-16 12:03 ` Alex Bennée
2022-12-09 5:19 ` [PATCH v3 7/8] accel/tcg: Move PageDesc tree into tb-maint.c for system Richard Henderson
2022-12-09 7:22 ` Philippe Mathieu-Daudé
2022-12-12 15:28 ` Richard Henderson [this message]
2022-12-12 18:19 ` Philippe Mathieu-Daudé
2022-12-09 9:28 ` Philippe Mathieu-Daudé
2022-12-09 5:19 ` [PATCH v3 8/8] accel/tcg: Move remainder of page locking to tb-maint.c Richard Henderson
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