From: Hans van Kranenburg <hans@knorrie.org>
To: Julien Grall <julien@xen.org>, xen-devel@lists.xenproject.org
Cc: bertrand.marquis@arm.com, Rahul.Singh@arm.com,
Julien Grall <jgrall@amazon.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: Re: [PATCH] xen/iommu: smmu: Use 1UL << 31 rather than 1 << 31
Date: Thu, 24 Dec 2020 20:48:10 +0100 [thread overview]
Message-ID: <617a8755-1993-d46d-d1bf-2f518b5d4233@knorrie.org> (raw)
In-Reply-To: <20201224152419.22453-1-julien@xen.org>
On 12/24/20 4:24 PM, Julien Grall wrote:
> From: Julien Grall <jgrall@amazon.com>
>
> Replace all the use of 1 << 31 with 1UL << 31 to prevent undefined
> behavior in the SMMU driver.
You're replacing it by 1U, not 1UL, in the patch below.
Hans
> Signed-off-by: Julien Grall <jgrall@amazon.com>
> ---
> xen/drivers/passthrough/arm/smmu.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
> index ed04d85e05e9..3e8aa378669b 100644
> --- a/xen/drivers/passthrough/arm/smmu.c
> +++ b/xen/drivers/passthrough/arm/smmu.c
> @@ -405,7 +405,7 @@ static struct iommu_group *iommu_group_get(struct device *dev)
> #define ID0_NUMSMRG_SHIFT 0
> #define ID0_NUMSMRG_MASK 0xff
>
> -#define ID1_PAGESIZE (1 << 31)
> +#define ID1_PAGESIZE (1U << 31)
> #define ID1_NUMPAGENDXB_SHIFT 28
> #define ID1_NUMPAGENDXB_MASK 7
> #define ID1_NUMS2CB_SHIFT 16
> @@ -438,7 +438,7 @@ static struct iommu_group *iommu_group_get(struct device *dev)
>
> /* Stream mapping registers */
> #define ARM_SMMU_GR0_SMR(n) (0x800 + ((n) << 2))
> -#define SMR_VALID (1 << 31)
> +#define SMR_VALID (1U << 31)
> #define SMR_MASK_SHIFT 16
> #define SMR_MASK_MASK 0x7fff
> #define SMR_ID_SHIFT 0
> @@ -506,7 +506,7 @@ static struct iommu_group *iommu_group_get(struct device *dev)
> #define RESUME_RETRY (0 << 0)
> #define RESUME_TERMINATE (1 << 0)
>
> -#define TTBCR_EAE (1 << 31)
> +#define TTBCR_EAE (1U << 31)
>
> #define TTBCR_PASIZE_SHIFT 16
> #define TTBCR_PASIZE_MASK 0x7
> @@ -562,7 +562,7 @@ static struct iommu_group *iommu_group_get(struct device *dev)
> #define MAIR_ATTR_IDX_CACHE 1
> #define MAIR_ATTR_IDX_DEV 2
>
> -#define FSR_MULTI (1 << 31)
> +#define FSR_MULTI (1U << 31)
> #define FSR_SS (1 << 30)
> #define FSR_UUT (1 << 8)
> #define FSR_ASF (1 << 7)
>
next prev parent reply other threads:[~2020-12-24 19:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-24 15:24 [PATCH] xen/iommu: smmu: Use 1UL << 31 rather than 1 << 31 Julien Grall
2020-12-24 19:48 ` Hans van Kranenburg [this message]
2021-01-13 17:50 ` Julien Grall
2021-01-04 14:21 ` Jan Beulich
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