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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id s4sm360957edu.49.2021.06.23.10.13.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Jun 2021 10:13:50 -0700 (PDT) Subject: Re: [PATCH 18/54] KVM: x86/mmu: Move nested NPT reserved bit calculation into MMU proper To: Sean Christopherson Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yu Zhang , Maxim Levitsky References: <20210622175739.3610207-1-seanjc@google.com> <20210622175739.3610207-19-seanjc@google.com> From: Paolo Bonzini Message-ID: <61d6fa84-6bfa-ec40-cc8c-5d968ca39b1b@redhat.com> Date: Wed, 23 Jun 2021 19:13:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210622175739.3610207-19-seanjc@google.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/06/21 19:57, Sean Christopherson wrote: > Move nested NPT's invocation of reset_shadow_zero_bits_mask() into the > MMU proper and unexport said function. Aside from dropping an export, > this is a baby step toward eliminating the call entirely by fixing the > shadow_root_level confusion. > > No functional change intended. > > Signed-off-by: Sean Christopherson Extra points for adding a comment about why the heck it's there. Paolo > --- > arch/x86/kvm/mmu.h | 3 --- > arch/x86/kvm/mmu/mmu.c | 11 ++++++++--- > arch/x86/kvm/svm/nested.c | 1 - > 3 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h > index 4e926f4935b0..62844bacd13f 100644 > --- a/arch/x86/kvm/mmu.h > +++ b/arch/x86/kvm/mmu.h > @@ -68,9 +68,6 @@ static __always_inline u64 rsvd_bits(int s, int e) > void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask); > void kvm_mmu_set_ept_masks(bool has_ad_bits, bool has_exec_only); > > -void > -reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context); > - > void kvm_init_mmu(struct kvm_vcpu *vcpu); > void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, > unsigned long cr4, u64 efer, gpa_t nested_cr3); > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index 02c54426e7a2..5a46a87b23b0 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -4212,8 +4212,8 @@ static inline u64 reserved_hpa_bits(void) > * table in guest or amd nested guest, its mmu features completely > * follow the features in guest. > */ > -void > -reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) > +static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, > + struct kvm_mmu *context) > { > /* > * KVM uses NX when TDP is disabled to handle a variety of scenarios, > @@ -4247,7 +4247,6 @@ reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) > } > > } > -EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); > > static inline bool boot_cpu_is_amd(void) > { > @@ -4714,6 +4713,12 @@ void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, > */ > context->shadow_root_level = new_role.base.level; > } > + > + /* > + * Redo the shadow bits, the reset done by shadow_mmu_init_context() > + * (above) may use the wrong shadow_root_level. > + */ > + reset_shadow_zero_bits_mask(vcpu, context); > } > EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); > > diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c > index 33b2f9337e26..927e545591c3 100644 > --- a/arch/x86/kvm/svm/nested.c > +++ b/arch/x86/kvm/svm/nested.c > @@ -110,7 +110,6 @@ static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu) > vcpu->arch.mmu->get_guest_pgd = nested_svm_get_tdp_cr3; > vcpu->arch.mmu->get_pdptr = nested_svm_get_tdp_pdptr; > vcpu->arch.mmu->inject_page_fault = nested_svm_inject_npf_exit; > - reset_shadow_zero_bits_mask(vcpu, vcpu->arch.mmu); > vcpu->arch.walk_mmu = &vcpu->arch.nested_mmu; > } > >