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[83.50.185.174]) by smtp.gmail.com with ESMTPSA id l5sm7109373wrs.59.2021.12.09.01.14.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Dec 2021 01:14:54 -0800 (PST) Message-ID: <62461e08-a5ef-f39c-3b7a-3a9426c1b11a@redhat.com> Date: Thu, 9 Dec 2021 10:14:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH] target/ppc: powerpc_excp: Guard ALIGNMENT interrupt with CONFIG_TCG To: Fabiano Rosas , qemu-devel@nongnu.org References: <20211208230650.2125095-1-farosas@linux.ibm.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20211208230650.2125095-1-farosas@linux.ibm.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -61 X-Spam_score: -6.2 X-Spam_bar: ------ X-Spam_report: (-6.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.618, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.803, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com, richard.henderson@linaro.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/9/21 00:06, Fabiano Rosas wrote: > We cannot have TCG code in powerpc_excp because the function is called > from kvm-only code via ppc_cpu_do_interrupt: > > ../target/ppc/excp_helper.c:463:29: error: implicit declaration of > function ‘cpu_ldl_code’ [-Werror=implicit-function-declaration] > > Fortunately, the Alignment interrupt is not among the ones dispatched > from kvm-only code, so we can keep it out of the disable-tcg build for > now. > > Fixes: 336e91f853 ("target/ppc: Move SPR_DSISR setting to powerpc_excp") > Signed-off-by: Fabiano Rosas > > --- > > Perhaps we could make powerpc_excp TCG only and have a separate > function that only knows the two interrupts that we use with KVM > (Program, Machine check). But for now this fix will do, I think. If KVM only uses 2 exception vectors, you could guard the enum in target/ppc/cpu.h using #ifdef'ry. While making the include uglier, it will helps to catch vector misused at compile time. > --- > target/ppc/excp_helper.c | 2 ++ > 1 file changed, 2 insertions(+)