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From: Jianmin Lv <lvjianmin@loongson.cn>
To: Bjorn Helgaas <helgaas@kernel.org>, Huacai Chen <chenhuacai@loongson.cn>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, "Xuefeng Li" <lixuefeng@loongson.cn>,
	"Huacai Chen" <chenhuacai@gmail.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH V13 6/6] PCI: Add quirk for multifunction devices of LS7A
Date: Wed, 1 Jun 2022 15:36:13 +0800	[thread overview]
Message-ID: <6286fb6e-8a4c-d0aa-115f-f6d11300193f@loongson.cn> (raw)
In-Reply-To: <20220601020737.GA798493@bhelgaas>


On 2022/6/1 上午10:07, Bjorn Helgaas wrote:
> On Sat, Apr 30, 2022 at 04:48:46PM +0800, Huacai Chen wrote:
>> From: Jianmin Lv <lvjianmin@loongson.cn>
>>
>> In LS7A, multifunction device use same PCI PIN (because the PIN register
>> report the same INTx value to each function) but we need different IRQ
>> for different functions, so add a quirk to fix it for standard PCI PIN
>> usage.
> Is this because your _PRT is missing or broken?  of_irq_parse_pci()
> reads and relies on PCI_INTERRUPT_PIN, too, so it seems like the _PRT
> could contain the same routing information you're getting from DT.
>

Thanks for your reply first.

In _PRT, we have following packages for pci device 6(a multi-fun device),


Package (0x04)
{
     0x0006FFFF,
     Zero,
     Zero,
     0x5D
     },

Package (0x04)
{
     0x0006FFFF,
     One,
     Zero,
     0x5C
},

the 'Pin' in two packages must be diffirent(0-INTA, 1-INTB, 2-INTC, 
3-INTD) because that the 'Pin' of the _PRT entry will be compared with 
the pin in the PIN register of pci config space for a pci device in 
following code path:

pci_device_probe
  ->pcibios_alloc_irq
    ->acpi_pci_irq_enable
      ->acpi_pci_irq_lookup
        ->acpi_pci_irq_find_prt_entry
          ->acpi_pci_irq_check_entry

and in acpi_pci_irq_check_entry(), there is following code:

         if (((prt->address >> 16) & 0xffff) != device ||
             prt->pin + 1 != pin)
                 return -ENODEV;

In LS7A, the PIN register returns same value(0) for all the different 
function, so, we have to fix it first.

I don't know if there is any other way to address it.


>> This patch only affect ACPI based systems (and only needed by ACPI based
>> systems, too). For DT based systems, the irq mappings is defined in .dts
>> files and be handled by of_irq_parse_pci().
>>
>> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>> ---
>>   drivers/pci/controller/pci-loongson.c | 32 +++++++++++++++++++++++++++
>>   1 file changed, 32 insertions(+)
>>
>> diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c
>> index 49d8b8c24ffb..024542a31a8c 100644
>> --- a/drivers/pci/controller/pci-loongson.c
>> +++ b/drivers/pci/controller/pci-loongson.c
>> @@ -22,6 +22,13 @@
>>   #define DEV_LS2K_APB	0x7a02
>>   #define DEV_LS7A_CONF	0x7a10
>>   #define DEV_LS7A_LPC	0x7a0c
>> +#define DEV_LS7A_GMAC	0x7a03
>> +#define DEV_LS7A_DC1	0x7a06
>> +#define DEV_LS7A_DC2	0x7a36
>> +#define DEV_LS7A_GPU	0x7a15
>> +#define DEV_LS7A_AHCI	0x7a08
>> +#define DEV_LS7A_EHCI	0x7a14
>> +#define DEV_LS7A_OHCI	0x7a24
>>   
>>   #define FLAG_CFG0	BIT(0)
>>   #define FLAG_CFG1	BIT(1)
>> @@ -102,6 +109,31 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
>>   DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
>>   			DEV_PCIE_PORT_2, loongson_bmaster_quirk);
>>   
>> +static void loongson_pci_pin_quirk(struct pci_dev *pdev)
>> +{
>> +	pdev->pin = 1 + (PCI_FUNC(pdev->devfn) & 3);
>> +}
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_DC1, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_DC2, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_GPU, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_GMAC, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_AHCI, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_EHCI, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_LS7A_OHCI, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_PCIE_PORT_0, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_PCIE_PORT_1, loongson_pci_pin_quirk);
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON,
>> +			DEV_PCIE_PORT_2, loongson_pci_pin_quirk);
>> +
>>   static struct loongson_pci *pci_bus_to_loongson_pci(struct pci_bus *bus)
>>   {
>>   	struct pci_config_window *cfg;
>> -- 
>> 2.27.0
>>


      reply	other threads:[~2022-06-01  7:36 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-30  8:48 [PATCH V13 0/6] PCI: Loongson pci improvements and quirks Huacai Chen
2022-04-30  8:48 ` [PATCH V13 1/6] PCI: loongson: Use generic 8/16/32-bit config ops on LS2K/LS7A Huacai Chen
2022-06-01  2:08   ` Bjorn Helgaas
2022-06-02  4:18     ` Huacai Chen
2022-04-30  8:48 ` [PATCH V13 2/6] PCI: loongson: Add ACPI init support Huacai Chen
2022-05-31 23:04   ` Bjorn Helgaas
2022-06-02  7:09     ` Huacai Chen
2022-04-30  8:48 ` [PATCH V13 3/6] PCI: loongson: Don't access unexisting devices Huacai Chen
2022-05-31 23:14   ` Bjorn Helgaas
2022-06-02  4:28     ` Huacai Chen
2022-06-02 16:23       ` Bjorn Helgaas
2022-06-02 20:00         ` Jiaxun Yang
2022-04-30  8:48 ` [PATCH V13 4/6] PCI: loongson: Improve the MRRS quirk for LS7A Huacai Chen
2022-06-01  2:22   ` Bjorn Helgaas
2022-06-01 11:59     ` Jiaxun Yang
2022-06-02  4:17       ` Huacai Chen
2022-06-02 16:20       ` Bjorn Helgaas
2022-06-03 12:13         ` Krzysztof Hałasa
2022-06-03 22:57         ` Jiaxun Yang
2022-06-04  0:07           ` Bjorn Helgaas
2022-06-08  8:29             ` Huacai Chen
2022-04-30  8:48 ` [PATCH V13 5/6] PCI: Add quirk for LS7A to avoid reboot failure Huacai Chen
2022-05-31 23:35   ` Bjorn Helgaas
2022-06-02 12:48     ` Huacai Chen
2022-06-02 16:29       ` Bjorn Helgaas
2022-06-08  9:34         ` Huacai Chen
2022-06-08 19:31           ` Bjorn Helgaas
2022-06-16  8:39             ` Huacai Chen
2022-06-16 22:57               ` Bjorn Helgaas
2022-06-17  2:21                 ` Huacai Chen
2022-06-17 11:37                   ` Bjorn Helgaas
2022-06-17 12:14                     ` Huacai Chen
2022-04-30  8:48 ` [PATCH V13 6/6] PCI: Add quirk for multifunction devices of LS7A Huacai Chen
2022-06-01  2:07   ` Bjorn Helgaas
2022-06-01  7:36     ` Jianmin Lv [this message]

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