From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vern.gendns.com (vern.gendns.com [98.142.107.122]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17B158471 for ; Fri, 4 Nov 2022 16:49:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date:Message-ID:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=/fSoTUtqLSMP2KfCqxLZIKji3GOepn9Xc93RPyjSVkg=; b=S05yN9/OkId9ymzRJ4dCjcPWLQ 7kS+7hwLHIGVXlHp7W14BxEpjdI4ntV02EjHSD7RVjfxzjyZZY+kvQZZx58NMhQA3G5XgkIRxucIi 1OotghPODhkcufNUd5I3CGkJL57YrmUvR1N06/jUXH2swC2CkuimIhdic8beAfGSReYdk0zY/yiuZ yCoOy4drXYmkZQ1P6bLMxXp+heS5TEP3UnHMbT+naZWwnajVpJ4cAXNOiBZHJHsv1ZCK1dTFhnhcE kQfJJLIU0/MUGSPFRmI/cJ4R007YPo4eHbdvB68luhk9bsDRd+9PwexE0o4g4q5uI6q1mQphZaEQ8 PyW6kaVA==; Received: from ip98-183-112-30.ok.ok.cox.net ([98.183.112.30]:33812 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.95) (envelope-from ) id 1oqzsl-00Ciq9-V8; Fri, 04 Nov 2022 12:49:41 -0400 Message-ID: <6296d944-e03d-6f2b-48b1-3dad78e3c89d@lechnology.com> Date: Fri, 4 Nov 2022 11:49:34 -0500 Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v2 54/65] clk: da8xx: clk48: Switch to determine_rate Content-Language: en-US To: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=c3=a4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven Cc: linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech> From: David Lechner In-Reply-To: <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - lists.linux.dev X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: On 11/4/22 8:18 AM, Maxime Ripard wrote: > The TI DA8xx USB0 clk48 clocks implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The driver does implement round_rate() though, which means that we can > change the rate of the clock, but we will never get to change the > parent. > > However, It's hard to tell whether it's been done on purpose or not. > > Since we'll start mandating a determine_rate() implementation, let's > convert the round_rate() implementation to a determine_rate(), which > will also make the current behavior explicit. And if it was an > oversight, the clock behaviour can be adjusted later on. I think this one should be the same as the clk:davinci changes and not allow re-parenting. Since this is a USB 48MHz PHY clock, a rate change will never be requested. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/davinci/da8xx-cfgchip.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c > index 4c1cc59bba53..f60c97091818 100644 > --- a/drivers/clk/davinci/da8xx-cfgchip.c > +++ b/drivers/clk/davinci/da8xx-cfgchip.c > @@ -462,10 +462,12 @@ static unsigned long da8xx_usb0_clk48_recalc_rate(struct clk_hw *hw, > return 48000000; > } > > -static long da8xx_usb0_clk48_round_rate(struct clk_hw *hw, unsigned long rate, > - unsigned long *parent_rate) > +static int da8xx_usb0_clk48_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > { > - return 48000000; > + req->rate = 48000000; > + > + return 0; > } > > static int da8xx_usb0_clk48_set_parent(struct clk_hw *hw, u8 index) > @@ -494,7 +496,7 @@ static const struct clk_ops da8xx_usb0_clk48_ops = { > .disable = da8xx_usb0_clk48_disable, > .is_enabled = da8xx_usb0_clk48_is_enabled, > .recalc_rate = da8xx_usb0_clk48_recalc_rate, > - .round_rate = da8xx_usb0_clk48_round_rate, > + .determine_rate = da8xx_usb0_clk48_determine_rate, > .set_parent = da8xx_usb0_clk48_set_parent, > .get_parent = da8xx_usb0_clk48_get_parent, > }; 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Received: from ip98-183-112-30.ok.ok.cox.net ([98.183.112.30]:33812 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.95) (envelope-from ) id 1oqzsl-00Ciq9-V8; Fri, 04 Nov 2022 12:49:41 -0400 Message-ID: <6296d944-e03d-6f2b-48b1-3dad78e3c89d@lechnology.com> Date: Fri, 4 Nov 2022 11:49:34 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v2 54/65] clk: da8xx: clk48: Switch to determine_rate Content-Language: en-US To: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=c3=a4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven Cc: linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech> From: David Lechner In-Reply-To: <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - lists.infradead.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_094949_686566_6E720F2C X-CRM114-Status: GOOD ( 29.59 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 11/4/22 8:18 AM, Maxime Ripard wrote: > The TI DA8xx USB0 clk48 clocks implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The driver does implement round_rate() though, which means that we can > change the rate of the clock, but we will never get to change the > parent. > > However, It's hard to tell whether it's been done on purpose or not. > > Since we'll start mandating a determine_rate() implementation, let's > convert the round_rate() implementation to a determine_rate(), which > will also make the current behavior explicit. And if it was an > oversight, the clock behaviour can be adjusted later on. I think this one should be the same as the clk:davinci changes and not allow re-parenting. Since this is a USB 48MHz PHY clock, a rate change will never be requested. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/davinci/da8xx-cfgchip.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c > index 4c1cc59bba53..f60c97091818 100644 > --- a/drivers/clk/davinci/da8xx-cfgchip.c > +++ b/drivers/clk/davinci/da8xx-cfgchip.c > @@ -462,10 +462,12 @@ static unsigned long da8xx_usb0_clk48_recalc_rate(struct clk_hw *hw, > return 48000000; > } > > -static long da8xx_usb0_clk48_round_rate(struct clk_hw *hw, unsigned long rate, > - unsigned long *parent_rate) > +static int da8xx_usb0_clk48_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > { > - return 48000000; > + req->rate = 48000000; > + > + return 0; > } > > static int da8xx_usb0_clk48_set_parent(struct clk_hw *hw, u8 index) > @@ -494,7 +496,7 @@ static const struct clk_ops da8xx_usb0_clk48_ops = { > .disable = da8xx_usb0_clk48_disable, > .is_enabled = da8xx_usb0_clk48_is_enabled, > .recalc_rate = da8xx_usb0_clk48_recalc_rate, > - .round_rate = da8xx_usb0_clk48_round_rate, > + .determine_rate = da8xx_usb0_clk48_determine_rate, > .set_parent = da8xx_usb0_clk48_set_parent, > .get_parent = da8xx_usb0_clk48_get_parent, > }; > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B17A8C433FE for ; Sat, 5 Nov 2022 07:24:05 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id AAD391735; Sat, 5 Nov 2022 08:23:13 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz AAD391735 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1667633043; bh=BcqqpXv7sRnS1/q1WgrqP+7uoktG/AmXTJLve/HBtlY=; h=Date:Subject:To:References:From:In-Reply-To:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; 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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v2 54/65] clk: da8xx: clk48: Switch to determine_rate Content-Language: en-US To: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=c3=a4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech> From: David Lechner In-Reply-To: <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - alsa-project.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: X-Mailman-Approved-At: Sat, 05 Nov 2022 08:03:30 +0100 Cc: linux-rtc@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, patches@opensource.cirrus.com, linux-actions@lists.infradead.org, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On 11/4/22 8:18 AM, Maxime Ripard wrote: > The TI DA8xx USB0 clk48 clocks implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The driver does implement round_rate() though, which means that we can > change the rate of the clock, but we will never get to change the > parent. > > However, It's hard to tell whether it's been done on purpose or not. > > Since we'll start mandating a determine_rate() implementation, let's > convert the round_rate() implementation to a determine_rate(), which > will also make the current behavior explicit. And if it was an > oversight, the clock behaviour can be adjusted later on. I think this one should be the same as the clk:davinci changes and not allow re-parenting. Since this is a USB 48MHz PHY clock, a rate change will never be requested. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/davinci/da8xx-cfgchip.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c > index 4c1cc59bba53..f60c97091818 100644 > --- a/drivers/clk/davinci/da8xx-cfgchip.c > +++ b/drivers/clk/davinci/da8xx-cfgchip.c > @@ -462,10 +462,12 @@ static unsigned long da8xx_usb0_clk48_recalc_rate(struct clk_hw *hw, > return 48000000; > } > > -static long da8xx_usb0_clk48_round_rate(struct clk_hw *hw, unsigned long rate, > - unsigned long *parent_rate) > +static int da8xx_usb0_clk48_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > { > - return 48000000; > + req->rate = 48000000; > + > + return 0; > } > > static int da8xx_usb0_clk48_set_parent(struct clk_hw *hw, u8 index) > @@ -494,7 +496,7 @@ static const struct clk_ops da8xx_usb0_clk48_ops = { > .disable = da8xx_usb0_clk48_disable, > .is_enabled = da8xx_usb0_clk48_is_enabled, > .recalc_rate = da8xx_usb0_clk48_recalc_rate, > - .round_rate = da8xx_usb0_clk48_round_rate, > + .determine_rate = da8xx_usb0_clk48_determine_rate, > .set_parent = da8xx_usb0_clk48_set_parent, > .get_parent = da8xx_usb0_clk48_get_parent, > }; >