From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [PATCH v2 08/10] ata: ahci: mvebu: Add support for A8k legacy bindings Date: Thu, 7 Mar 2019 16:31:48 +0000 Message-ID: <634bb5cc-aab9-eecb-cba9-8c7762e888c9@arm.com> References: <20190306102146.13005-1-miquel.raynal@bootlin.com> <20190306102146.13005-9-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190306102146.13005-9-miquel.raynal@bootlin.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Miquel Raynal , Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Rob Herring , Mark Rutland , Jens Axboe , Hans de Goede , Thomas Gleixner Cc: devicetree@vger.kernel.org, Baruch Siach , Antoine Tenart , Maxime Chevallier , Nadav Haklai , linux-ide@vger.kernel.org, Thomas Petazzoni , linux-arm-kernel@lists.infradead.org List-Id: linux-ide@vger.kernel.org On 06/03/2019 10:21, Miquel Raynal wrote: > The CP110 SATA unit has 2 ports, and a dedicated ICU entry per > port. In the past, the AHCI SATA driver only supported one interrupt > per SATA unit. To solve this conflict, the 2 SATA wired interrupts in > the South-Bridge got configured as 1 GIC interrupt in the > North-Bridge, regardless of the number of SATA ports actually > enabled/in use, and the bindings only referenced the interrupt of one > port. > > Since then, this limitation has been addressed and this patch ensures > backward compatibility with old DTs not describing SATA ports > correctly directly from the AHCI MVEBU driver. This way, we will be > able to drop the hack from the ICU driver. IOW, when the A8k > compatible string is used and there is no sub-nodes in the DT, we > fake the creation and mapping of the second (missing) interrupt. > > Signed-off-by: Miquel Raynal It'd be good to add that all these hacks only exist for the purpose of DT. The same HW booting with ACPI doesn't require any of this because the firmware abstracts stuff that the kernel shouldn't be concerned with the first place. Thanks, M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED6C3C43381 for ; Thu, 7 Mar 2019 16:32:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B997F2081B for ; Thu, 7 Mar 2019 16:32:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="RmTPSXGR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B997F2081B Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1vw5-0004ak-C4; Thu, 07 Mar 2019 16:31:57 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1vw2-0004aH-De for linux-arm-kernel@lists.infradead.org; Thu, 07 Mar 2019 16:31:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5F4AC80D; Thu, 7 Mar 2019 08:31:53 -0800 (PST) Received: from [10.1.196.92] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 75A1E3F706; Thu, 7 Mar 2019 08:31:50 -0800 (PST) Subject: Re: [PATCH v2 08/10] ata: ahci: mvebu: Add support for A8k legacy bindings To: Miquel Raynal , Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Rob Herring , Mark Rutland , Jens Axboe , Hans de Goede , Thomas Gleixner References: <20190306102146.13005-1-miquel.raynal@bootlin.com> <20190306102146.13005-9-miquel.raynal@bootlin.com> From: Marc Zyngier Openpgp: preference=signencrypt Autocrypt: addr=marc.zyngier@arm.com; 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Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <20190306102146.13005-9-miquel.raynal@bootlin.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190307_083154_473211_7E42EC1D X-CRM114-Status: GOOD ( 19.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Baruch Siach , Antoine Tenart , Maxime Chevallier , Nadav Haklai , linux-ide@vger.kernel.org, Thomas Petazzoni , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 06/03/2019 10:21, Miquel Raynal wrote: > The CP110 SATA unit has 2 ports, and a dedicated ICU entry per > port. In the past, the AHCI SATA driver only supported one interrupt > per SATA unit. To solve this conflict, the 2 SATA wired interrupts in > the South-Bridge got configured as 1 GIC interrupt in the > North-Bridge, regardless of the number of SATA ports actually > enabled/in use, and the bindings only referenced the interrupt of one > port. > > Since then, this limitation has been addressed and this patch ensures > backward compatibility with old DTs not describing SATA ports > correctly directly from the AHCI MVEBU driver. This way, we will be > able to drop the hack from the ICU driver. IOW, when the A8k > compatible string is used and there is no sub-nodes in the DT, we > fake the creation and mapping of the second (missing) interrupt. > > Signed-off-by: Miquel Raynal It'd be good to add that all these hacks only exist for the purpose of DT. The same HW booting with ACPI doesn't require any of this because the firmware abstracts stuff that the kernel shouldn't be concerned with the first place. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel