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From: Stefan Roese <sr@denx.de>
To: Weijie Gao <weijie.gao@mediatek.com>, u-boot@lists.denx.de
Cc: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
	Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Subject: Re: [PATCH v4 06/25] mips: mtmips: add two reference boards for mt7621
Date: Tue, 10 May 2022 15:26:54 +0200	[thread overview]
Message-ID: <6360a084-255f-698c-d83a-ea6a398bf5f0@denx.de> (raw)
In-Reply-To: <588c9da01d6d2fd8b295291eb757378ba8339248.1652183768.git.weijie.gao@mediatek.com>

On 10.05.22 14:18, Weijie Gao wrote:
> The mt7621_rfb board supports integrated giga PHYs plus one external
> giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
> slots, SDXC and USB.
> 
> The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
> uses NAND flash and SDXC is not available.
> 
> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
> v4 changes:
>    Modify defconfig files for booting from flash
> v3 changes: none
> v2 changes:
>    Add config file for mt7621-rfb boards
> ---
>   arch/mips/dts/Makefile                     |  2 +
>   arch/mips/dts/mediatek,mt7621-nand-rfb.dts | 52 ++++++++++++++
>   arch/mips/dts/mediatek,mt7621-rfb.dts      | 68 ++++++++++++++++++
>   arch/mips/mach-mtmips/mt7621/Kconfig       | 20 ++++++
>   board/mediatek/mt7621/MAINTAINERS          |  8 +++
>   board/mediatek/mt7621/Makefile             |  3 +
>   board/mediatek/mt7621/board.c              |  6 ++
>   configs/mt7621_nand_rfb_defconfig          | 81 ++++++++++++++++++++++
>   configs/mt7621_rfb_defconfig               | 80 +++++++++++++++++++++
>   9 files changed, 320 insertions(+)
>   create mode 100644 arch/mips/dts/mediatek,mt7621-nand-rfb.dts
>   create mode 100644 arch/mips/dts/mediatek,mt7621-rfb.dts
>   create mode 100644 board/mediatek/mt7621/MAINTAINERS
>   create mode 100644 board/mediatek/mt7621/Makefile
>   create mode 100644 board/mediatek/mt7621/board.c
>   create mode 100644 configs/mt7621_nand_rfb_defconfig
>   create mode 100644 configs/mt7621_rfb_defconfig
> 
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index 95144b24dc..1b179116c9 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -16,6 +16,8 @@ dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
>   dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
>   dtb-$(CONFIG_BOARD_MT7620_RFB) += mediatek,mt7620-rfb.dtb
>   dtb-$(CONFIG_BOARD_MT7620_MT7530_RFB) += mediatek,mt7620-mt7530-rfb.dtb
> +dtb-$(CONFIG_BOARD_MT7621_RFB) += mediatek,mt7621-rfb.dtb
> +dtb-$(CONFIG_BOARD_MT7621_NAND_RFB) += mediatek,mt7621-nand-rfb.dtb
>   dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
>   dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb
>   dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb
> diff --git a/arch/mips/dts/mediatek,mt7621-nand-rfb.dts b/arch/mips/dts/mediatek,mt7621-nand-rfb.dts
> new file mode 100644
> index 0000000000..d159531a56
> --- /dev/null
> +++ b/arch/mips/dts/mediatek,mt7621-nand-rfb.dts
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2022 MediaTek Inc. All rights reserved.
> + *
> + * Author: Weijie Gao <weijie.gao@mediatek.com>
> + */
> +
> +/dts-v1/;
> +
> +#include "mt7621.dtsi"
> +
> +/ {
> +	compatible = "mediatek,mt7621-nand-rfb", "mediatek,mt7621-soc";
> +	model = "MediaTek MT7621 RFB (NAND)";
> +
> +	aliases {
> +		serial0 = &uart0;
> +	};
> +
> +	chosen {
> +		stdout-path = &uart0;
> +	};
> +};
> +
> +&pinctrl {
> +	state_default: pin_state {
> +		nand {
> +			groups = "spi", "sdxc";
> +			function = "nand";
> +		};
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&gpio {
> +	status = "okay";
> +};
> +
> +&eth {
> +	status = "okay";
> +};
> +
> +&ssusb {
> +	status = "okay";
> +};
> +
> +&u3phy {
> +	status = "okay";
> +};
> diff --git a/arch/mips/dts/mediatek,mt7621-rfb.dts b/arch/mips/dts/mediatek,mt7621-rfb.dts
> new file mode 100644
> index 0000000000..4a3b850ddd
> --- /dev/null
> +++ b/arch/mips/dts/mediatek,mt7621-rfb.dts
> @@ -0,0 +1,68 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2022 MediaTek Inc. All rights reserved.
> + *
> + * Author: Weijie Gao <weijie.gao@mediatek.com>
> + */
> +
> +/dts-v1/;
> +
> +#include "mt7621.dtsi"
> +
> +/ {
> +	compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc";
> +	model = "MediaTek MT7621 RFB (SPI-NOR)";
> +
> +	aliases {
> +		serial0 = &uart0;
> +		spi0 = &spi;
> +	};
> +
> +	chosen {
> +		stdout-path = &uart0;
> +	};
> +};
> +
> +&pinctrl {
> +	state_default: pin_state {
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&gpio {
> +	status = "okay";
> +};
> +
> +&spi {
> +	status = "okay";
> +	num-cs = <2>;
> +
> +	spi-flash@0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "jedec,spi-nor";
> +		spi-max-frequency = <25000000>;
> +		reg = <0>;
> +	};
> +};
> +
> +&eth {
> +	status = "okay";
> +};
> +
> +&mmc {
> +	cap-sd-highspeed;
> +
> +	status = "okay";
> +};
> +
> +&ssusb {
> +	status = "okay";
> +};
> +
> +&u3phy {
> +	status = "okay";
> +};
> diff --git a/arch/mips/mach-mtmips/mt7621/Kconfig b/arch/mips/mach-mtmips/mt7621/Kconfig
> index 37d512c68f..008a28f991 100644
> --- a/arch/mips/mach-mtmips/mt7621/Kconfig
> +++ b/arch/mips/mach-mtmips/mt7621/Kconfig
> @@ -79,6 +79,26 @@ config MT7621_BOOT_FROM_NAND
>   choice
>   	prompt "Board select"
>   
> +config BOARD_MT7621_RFB
> +	bool "MediaTek MT7621 RFB (SPI-NOR)"
> +	help
> +	  The reference design of MT7621A (WS3010) booting from SPI-NOR flash.
> +	  The board can be configured with DDR2 (64MiB~256MiB) or DDR3
> +	  (128MiB~512MiB). The board has 16 MiB SPI-NOR flash, built-in MT7530
> +	  GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 1 SDXC, 3 PCIe
> +	  sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out),
> +	  JTAG pins and expansion GPIO pins.
> +
> +config BOARD_MT7621_NAND_RFB
> +	bool "MediaTek MT7621 RFB (NAND)"
> +	help
> +	  The reference design of MT7621A (WS3010) booting from NAND flash.
> +	  The board can be configured with DDR2 (64MiB~256MiB) or DDR3
> +	  (128MiB~512MiB). The board has 128 MiB parallel NAND flash, built-in
> +	  MT7530 GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 3 PCIe
> +	  sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out),
> +	  JTAG pins and expansion GPIO pins.
> +
>   endchoice
>   
>   config SYS_CONFIG_NAME
> diff --git a/board/mediatek/mt7621/MAINTAINERS b/board/mediatek/mt7621/MAINTAINERS
> new file mode 100644
> index 0000000000..7324353e0b
> --- /dev/null
> +++ b/board/mediatek/mt7621/MAINTAINERS
> @@ -0,0 +1,8 @@
> +MT7621_RFB BOARD
> +M:	Weijie Gao <weijie.gao@mediatek.com>
> +S:	Maintained
> +F:	board/mediatek/mt7621
> +F:	configs/mt7621_rfb_ramboot_defconfig
> +F:	configs/mt7621_nand_rfb_ramboot_defconfig
> +F:	arch/mips/dts/mediatek,mt7621-rfb.dts
> +F:	arch/mips/dts/mediatek,mt7621-nand-rfb.dts
> diff --git a/board/mediatek/mt7621/Makefile b/board/mediatek/mt7621/Makefile
> new file mode 100644
> index 0000000000..db129c5aba
> --- /dev/null
> +++ b/board/mediatek/mt7621/Makefile
> @@ -0,0 +1,3 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +obj-y += board.o
> diff --git a/board/mediatek/mt7621/board.c b/board/mediatek/mt7621/board.c
> new file mode 100644
> index 0000000000..0496f3f806
> --- /dev/null
> +++ b/board/mediatek/mt7621/board.c
> @@ -0,0 +1,6 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2022 MediaTek Inc. All rights reserved.
> + *
> + * Author: Weijie Gao <weijie.gao@mediatek.com>
> + */
> diff --git a/configs/mt7621_nand_rfb_defconfig b/configs/mt7621_nand_rfb_defconfig
> new file mode 100644
> index 0000000000..54464a4da5
> --- /dev/null
> +++ b/configs/mt7621_nand_rfb_defconfig
> @@ -0,0 +1,81 @@
> +CONFIG_MIPS=y
> +CONFIG_SYS_MALLOC_LEN=0x100000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_SIZE=0x1000
> +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-nand-rfb"
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
> +CONFIG_SPL=y
> +CONFIG_DEBUG_UART_BASE=0xbe000c00
> +CONFIG_DEBUG_UART_CLOCK=50000000
> +CONFIG_SYS_LOAD_ADDR=0x83000000
> +CONFIG_ARCH_MTMIPS=y
> +CONFIG_SOC_MT7621=y
> +CONFIG_MT7621_BOOT_FROM_NAND=y
> +CONFIG_BOARD_MT7621_NAND_RFB=y
> +# CONFIG_MIPS_CACHE_SETUP is not set
> +# CONFIG_MIPS_CACHE_DISABLE is not set
> +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
> +CONFIG_MIPS_BOOT_FDT=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_FIT=y
> +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
> +CONFIG_SPL_NAND_SUPPORT=y
> +CONFIG_SPL_NAND_BASE=y
> +CONFIG_SPL_NAND_IDENT=y
> +# CONFIG_BOOTM_NETBSD is not set
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_CRC32 is not set
> +# CONFIG_CMD_DM is not set
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_GPIO=y
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> +CONFIG_CMD_PART=y
> +# CONFIG_CMD_PINMUX is not set
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_NFS is not set
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +# CONFIG_ISO_PARTITION is not set
> +CONFIG_EFI_PARTITION=y
> +CONFIG_PARTITION_TYPE_GUID=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +# CONFIG_I2C is not set
> +# CONFIG_INPUT is not set
> +CONFIG_MMC=y
> +# CONFIG_MMC_QUIRKS is not set
> +# CONFIG_MMC_HW_PARTITIONING is not set
> +CONFIG_MMC_MTK=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_MTD_RAW_NAND=y
> +CONFIG_NAND_MT7621=y
> +CONFIG_SYS_NAND_ONFI_DETECTION=y
> +CONFIG_MEDIATEK_ETH=y
> +CONFIG_PHY=y
> +CONFIG_PHY_MTK_TPHY=y
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYSRESET=y
> +CONFIG_SYSRESET_RESETCTL=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_MTK=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_WDT=y
> +CONFIG_WDT_MT7621=y
> +CONFIG_FAT_WRITE=y
> +# CONFIG_BINMAN_FDT is not set
> +CONFIG_LZMA=y
> +# CONFIG_GZIP is not set
> +CONFIG_SPL_LZMA=y
> diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig
> new file mode 100644
> index 0000000000..b3cb7388f0
> --- /dev/null
> +++ b/configs/mt7621_rfb_defconfig
> @@ -0,0 +1,80 @@
> +CONFIG_MIPS=y
> +CONFIG_SYS_MALLOC_LEN=0x100000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_SIZE=0x1000
> +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb"
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
> +CONFIG_SPL=y
> +CONFIG_DEBUG_UART_BASE=0xbe000c00
> +CONFIG_DEBUG_UART_CLOCK=50000000
> +CONFIG_SYS_LOAD_ADDR=0x83000000
> +CONFIG_ARCH_MTMIPS=y
> +CONFIG_SOC_MT7621=y
> +# CONFIG_MIPS_CACHE_SETUP is not set
> +# CONFIG_MIPS_CACHE_DISABLE is not set
> +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
> +CONFIG_MIPS_BOOT_FDT=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
> +CONFIG_FIT=y
> +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
> +CONFIG_SPL_NOR_SUPPORT=y
> +CONFIG_TPL=y
> +# CONFIG_TPL_FRAMEWORK is not set
> +# CONFIG_BOOTM_NETBSD is not set
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_CRC32 is not set
> +# CONFIG_CMD_DM is not set
> +CONFIG_CMD_GPIO=y
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PART=y
> +# CONFIG_CMD_PINMUX is not set
> +CONFIG_CMD_SPI=y
> +# CONFIG_CMD_NFS is not set
> +CONFIG_DOS_PARTITION=y
> +# CONFIG_ISO_PARTITION is not set
> +CONFIG_EFI_PARTITION=y
> +CONFIG_PARTITION_TYPE_GUID=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +# CONFIG_I2C is not set
> +# CONFIG_INPUT is not set
> +CONFIG_MMC=y
> +# CONFIG_MMC_QUIRKS is not set
> +# CONFIG_MMC_HW_PARTITIONING is not set
> +CONFIG_MMC_MTK=y
> +CONFIG_SF_DEFAULT_SPEED=20000000
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_EON=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_ISSI=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_XMC=y
> +CONFIG_SPI_FLASH_XTX=y
> +CONFIG_MEDIATEK_ETH=y
> +CONFIG_PHY=y
> +CONFIG_PHY_MTK_TPHY=y
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SPI=y
> +CONFIG_MT7621_SPI=y
> +CONFIG_SYSRESET=y
> +CONFIG_SYSRESET_RESETCTL=y
> +CONFIG_WDT=y
> +CONFIG_WDT_MT7621=y
> +# CONFIG_BINMAN_FDT is not set
> +CONFIG_LZMA=y
> +# CONFIG_GZIP is not set
> +CONFIG_SPL_LZMA=y

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

  reply	other threads:[~2022-05-10 13:27 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 12:18 [PATCH v4 00/25] Add support for MediaTek MT7621 SoC Weijie Gao
2022-05-10 12:18 ` [PATCH v4 01/25] mips: add asm/mipsmtregs.h for MIPS multi-threading Weijie Gao
2022-05-10 12:18 ` [PATCH v4 02/25] mips: add more definitions for asm/cm.h Weijie Gao
2022-05-10 12:18 ` [PATCH v4 03/25] mips: add __image_copy_len for SPL linker script Weijie Gao
2022-05-10 12:18 ` [PATCH v4 04/25] mips: add support for noncached_alloc() Weijie Gao
2022-05-10 12:18 ` [PATCH v4 05/25] mips: mtmips: add support for MediaTek MT7621 SoC Weijie Gao
2022-05-11 16:36   ` Sean Anderson
2022-05-12  3:00     ` Weijie Gao
2022-05-10 12:18 ` [PATCH v4 06/25] mips: mtmips: add two reference boards for mt7621 Weijie Gao
2022-05-10 13:26   ` Stefan Roese [this message]
2022-05-10 12:18 ` [PATCH v4 07/25] doc: mediatek: add documentation for mt7621 reference boards Weijie Gao
2022-05-10 12:18 ` [PATCH v4 08/25] clk: mtmips: add clock driver for MediaTek MT7621 SoC Weijie Gao
2022-05-11 16:29   ` Sean Anderson
2022-05-12  2:38     ` Weijie Gao
2022-05-10 12:18 ` [PATCH v4 09/25] reset: mtmips: add reset controller support " Weijie Gao
2022-05-10 12:18 ` [PATCH v4 10/25] pinctrl: mtmips: add " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 11/25] usb: xhci-mtk: " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 12/25] phy: mtk-tphy: " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 13/25] spi: " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 14/25] gpio: " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 15/25] watchdog: " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 16/25] mmc: mediatek: " Weijie Gao
2022-05-10 12:19 ` [PATCH v4 17/25] net: mediatek: remap iobase address Weijie Gao
2022-05-16  0:24   ` Ramon Fried
2022-05-10 12:19 ` [PATCH v4 18/25] net: mediatek: use regmap api to modify ethsys registers Weijie Gao
2022-05-16  0:25   ` Ramon Fried
2022-05-10 12:19 ` [PATCH v4 19/25] net: mediatek: add support for MediaTek MT7621 SoC Weijie Gao
2022-05-16  0:25   ` Ramon Fried
2022-05-10 12:19 ` [PATCH v4 20/25] nand: raw: " Weijie Gao
2022-05-10 12:20 ` [PATCH v4 21/25] spl: allow using nand base without standard nand driver Weijie Gao
2022-05-10 12:20 ` [PATCH v4 22/25] spl: spl_legacy: fix the use of SPL_COPY_PAYLOAD_ONLY Weijie Gao
2022-05-10 12:20 ` [PATCH v4 23/25] spl: nand: support loading legacy image with payload compressed Weijie Gao
2022-05-10 12:20 ` [PATCH v4 24/25] tools: mtk_image: add support for MT7621 NAND images Weijie Gao
2022-05-10 12:20 ` [PATCH v4 25/25] MAINTAINERS: update maintainer for MediaTek MIPS platform Weijie Gao

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