From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00EBEC433EF for ; Wed, 8 Sep 2021 05:00:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C63C161164 for ; Wed, 8 Sep 2021 05:00:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230390AbhIHFB5 (ORCPT ); Wed, 8 Sep 2021 01:01:57 -0400 Received: from terminus.zytor.com ([198.137.202.136]:42139 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229523AbhIHFB4 (ORCPT ); Wed, 8 Sep 2021 01:01:56 -0400 Received: from tazenda.hos.anvin.org ([IPv6:2601:646:8600:3c70:7285:c2ff:fefb:fd4]) (authenticated bits=0) by mail.zytor.com (8.16.1/8.15.2) with ESMTPSA id 18850VV94012233 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Tue, 7 Sep 2021 22:00:31 -0700 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 18850VV94012233 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2021083001; t=1631077232; bh=TEs3G7nTU1z36GboNC8t0vkl4iSss29X6AB2yu1p5II=; h=Subject:From:To:Cc:References:Date:In-Reply-To:From; b=UF/Dk5w0mSCCb8QzKPqv0NFOx5wqNldHZgZBvbPZqF3VpK/UoMcYyNpj+Dgr5jqqP lNA4EUkvyfCmGMWcNWmCZOQe9Qsr70hC7L/QcMO0vA+yEcDJO+bjD6NAKzMIddAmRZ hMtZOVqD9VQjS++LW7EYDleLq6emhCOkJhBzBsj/5SY0nyRctZaI/nQiWp0IYyM+YY ixg3+SoxH/TgwkzV4awZEN92vqfkFyDcIWGZm+KSH6j0yXwUpgEZ7tcXB4v7UDVONl 4kqIbvj2jlnHYy6qPfXI8rz+0tpX2AlgSs+1SghbhO9m7SH/zqQFA/f63mX/zv+Bft forpGVg9xouUQ== Subject: Re: [PATCH 25/24] x86/traps: Rewrite native_load_gs_index in C code From: "H. Peter Anvin" To: Lai Jiangshan , linux-kernel@vger.kernel.org Cc: Lai Jiangshan , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, Dave Hansen , Peter Zijlstra , Dave Jiang , Ben Widawsky , Dan Williams , Arvind Sankar References: <20210831175025.27570-1-jiangshanlai@gmail.com> <20210902105052.2842-1-jiangshanlai@gmail.com> <9fdb04b1-dbb8-069d-f5ef-d4e8c0f2a83e@zytor.com> Message-ID: <638f3b2b-aff9-72e5-3a5d-fff5ef6b88fc@zytor.com> Date: Tue, 7 Sep 2021 22:00:25 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/7/21 9:42 PM, H. Peter Anvin wrote: > > > On 9/7/21 6:38 PM, H. Peter Anvin wrote: >> On 9/2/21 3:50 AM, Lai Jiangshan wrote: >>> From: Lai Jiangshan >>> >>> There is no constrain/limition to force native_load_gs_index() to be in >>> ASM code. >> >> Hi, >> >> First of all, let me say I really like your patchset, and I will try to >> review it in detail ASAP (most of the initial read pass looks very sane >> to me. >> >> However, I would like to object in part this specific patch. It adds a >> fair bit of extra code to the exception path, and adds jumps between >> files which makes the code much harder to read. >> >> You end up doing one swapgs in assembly and one in C, which would seem >> to be a very good indication that really isn't an improvement. >> >> Note that this entire sequence is scheduled to be obsoleted by a single >> atomic hardware instruction, LKGS, which will replace ALL of >> native_load_gs_index(); it will no longer be necessary even to disable >> interrupts as there is no non-atomic state. In that sense, doing this as >> an out-of-line C function (with some inline assembly) is great, because >> it makes it far easier to use LKGS as an alternative; the only (small) >> disadvantage is that it ends up clobbering a lot of registers >> unnecessarily (in assembly it can be implemented clobbering only two >> registers; one if one uses pushf/popf to save the interrupt flag.) >> > > OK, here is a version which actually compiles: > ... slightly shorter and minimally better compiled code ... noinstr void native_load_gs_index(unsigned int selector) { unsigned long flags; local_irq_save(flags); native_swapgs(); do_mov_gs: asm_volatile_goto("1: mov %[seg],%%gs\n" "2:\n" _ASM_EXTABLE(1b,%l[bad_seg]) : : [seg] "r" (selector) : : bad_seg); alternative("", "mfence", X86_BUG_SWAPGS_FENCE); native_swapgs(); local_irq_restore(flags); return; bad_seg: /* The exception dispatch will have restored kernel GS */ native_swapgs(); alternative_input("", "mov %[seg],%%gs", X86_BUG_NULL_SEG, [seg] "r" (__USER_DS)); selector = 0; goto do_mov_gs; }