From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2844C52D11 for ; Thu, 26 Jan 2023 16:58:59 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6543B856E7; Thu, 26 Jan 2023 17:58:57 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kwiboo.se header.i=@kwiboo.se header.b="ETX1Ew37"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id AC389856F4; Thu, 26 Jan 2023 17:58:54 +0100 (CET) Received: from xtrwsqbh.outbound-mail.sendgrid.net (xtrwsqbh.outbound-mail.sendgrid.net [167.89.100.176]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7A89B856E7 for ; Thu, 26 Jan 2023 17:58:46 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=bounces+31435339-7456-u-boot=lists.denx.de@em2124.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=mime-version:subject:references:from:in-reply-to:to:cc:content-type: content-transfer-encoding:cc:content-type:from:subject:to; s=s1; bh=WBBHBD/ZVu2Ak94pNB0XRAx89IlQUnQ3NZ6u/tDgg38=; b=ETX1Ew37DLxaA9YNBShIf5eCYCANg/Rlvnv2GBUCl6I4rUcsWJ3OayvJtnWCxuV7W52n in9xTwJq46+4ZA/75u6r1WYfuznDAkwoVyvh1oID6nc26xcZCL/BGXDOq67+y5WLVPSh2U 7sXidmp7Cl5dfDeGtLAIEBussW5c86G2s7t48UOD9P77DGo8fucZ+IXuiv1akmOSRTfirY +y11rgO7jeoe2pAmaZyrpBUWCkIGDkXermS5Ttkbfdn9wGCtXkIiwW5Gk1N/+ipGp7xQyH JOirNVWZHwwj02JX9XtWbq0H1f+RATog7oDLTN0fknmS5PS/Urw4FxIuQJpFWuNA== Received: by filterdrecv-6c4ccfbdd8-jnlkt with SMTP id filterdrecv-6c4ccfbdd8-jnlkt-1-63D2B143-27 2023-01-26 16:58:43.822284214 +0000 UTC m=+6025992.001429762 Received: from [192.168.1.50] (unknown) by geopod-ismtpd-1-1 (SG) with ESMTP id gkBgS7YFS-KETdiPmy7YZg Thu, 26 Jan 2023 16:58:43.479 +0000 (UTC) Message-ID: <64443c40-03b1-bfe2-23fe-ad61236d7dde@kwiboo.se> Date: Thu, 26 Jan 2023 16:58:44 +0000 (UTC) MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [RFC PATCH 00/16] arm: Add Rockchip RK3588 support Content-Language: en-US References: <20230125222741.303259-1-jagan@edgeble.ai> <2efd56b6-4dc9-cd77-3792-e60142faa6ae@kwiboo.se> From: Jonas Karlman In-Reply-To: X-SG-EID: =?us-ascii?Q?TdbjyGynYnRZWhH+7lKUQJL+ZxmxpowvO2O9SQF5CwCVrYgcwUXgU5DKUU3QxA?= =?us-ascii?Q?fZekEeQsTe+RrMu3cja6a0h9cg2dWrbzve66U=2F7?= =?us-ascii?Q?af=2FWulmCuFycAFat5lfMHjNccLygH=2FteuF5swk=2F?= =?us-ascii?Q?VrrTpJZWQ0U5SJ0zjGwSaAih4C=2F=2F7XA7wtm3Fc4?= =?us-ascii?Q?lrIS2hZ99YaQRVhqG+UE2AW9ycoKkdleTpQzr2t?= =?us-ascii?Q?jPBdANIz53QiP03d9VnzvVRM0qrq9Dk8ISnWVk?= To: Jagan Teki Cc: Kever Yang , Simon Glass , Philipp Tomsich , fatorangecat@189.cn, u-boot@lists.denx.de X-Entity-ID: P7KYpSJvGCELWjBME/J5tg== Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Jagan, On 2023-01-26 17:51, Jagan Teki wrote: > Hi Jonas, > > On Thu, 26 Jan 2023 at 04:17, Jonas Karlman wrote: >> >> Hi Jagan, >> >> On 2023-01-25 23:27, Jagan Teki wrote: >>> This series support Rockchip RK3588. All the device tree files are >>> synced from linux-next with the proper SHA1 mentioned in the commit >>> messages. >>> >>> Unfortunately, the BL31 from rkbin is not compatible with U-Boot so >>> it is failing to load ATF entry from SPL and hang. >>> >>> Verified below BL31 versions, >>> bl31-v1.15 >>> bl31-v1.21 >>> bl31-v1.22 >>> bl31-v1.23 >>> bl31-v1.24 >>> bl31-v1.25 >>> bl31-v1.26 >>> >>> Rever-engineered with respect to rockchip u-boot by using the same >>> FIT_GENERATOR being used in Mainline, rockchip u-boot is booting but >>> mainline showing the same issue. >>> >>> Log: >>> >>> LPDDR4X, 2112MHz01-00642-g6bdfd31756-dirty (Jan 26 2023 ���3:44:34 +0530) >>> channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB >>> channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB >>> channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB >>> channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB >>> change to F1: 528MHz >>> change to F2: 1068MHz >>> change to F3: 1560MHz >>> change to F0: 2112MHz >>> out >>> >>> U-Boot SPL 2023.01-00642-g6bdfd31756-dirty (Jan 26 2023 - 03:44:34 +0530) >>> Trying to boot from MMC1 >>> bl31_entry: atf_entry start >>> << hang >> >>> >>> Any information on BL31 for RK3588 please share. >> >> I had a similar strange booing issue with RK3568 and mainline U-Boot, >> turned out to be related to all parts of ATF not being properly loaded >> into PMU SRAM. >> >> Using my series at [1] I managed to get ATF to be fully loaded into >> PMU SRAM. Using CONFIG_SPL_FIT_SIGNATURE=y helped me finding out that >> the segment being loaded ended up corrupted. >> >> The use of 512 bytes alignment of the FIT helped mitigate that issue. >> Vendor U-Boot use a bounce buffer for all parts that is written into >> SRAM (anything loaded outside the gd->ram_base to gd->ram_top range). >> >> You can also find newer bl31 at [2], up to version v1.32. >> >> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=337891>>> [2] https://gitlab.com/rk3588_linux/rk/rkbin/-/tree/linux-5.10-gen-rkr3.5/bin/rk35>> > Thanks for the details. I did apply this set on the master. No change > in the behavior, used BL31 and ddr from [2] as well as in > rkbin/master. I did some tests on my Radxa ROCK 3 Model B with CONFIG_SPL_FIT_SIGNATURE=y and it looked like it failed to read data into memory, see below. It also looks like the sdhci compatible is not supported by the driver. Something that may need to be added to driver to properly read data? DDR V1.09 a930779e06 typ 22/11/21-17:50:56 LPDDR4X, 2112MHz channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB Manufacturer ID:0x6 CH0 RX Vref:31.7%, TX Vref:21.8%,20.8% CH1 RX Vref:31.7%, TX Vref:21.8%,21.8% CH2 RX Vref:32.7%, TX Vref:22.8%,21.8% CH3 RX Vref:32.7%, TX Vref:21.8%,20.8% change to F1: 528MHz change to F2: 1068MHz change to F3: 1560MHz change to F0: 2112MHz out U-Boot SPL 2023.01 (Jan 26 2023 - 00:24:53 +0000) Trying to boot from MMC1 ## Checking hash(es) for config config_1 ... OK ## Checking hash(es) for Image atf_1 ... sha256 error! Bad hash value for 'hash' hash node in 'atf_1' image node mmc_load_image_raw_sector: mmc block read error Trying to boot from MMC1 ## Checking hash(es) for config config_1 ... OK ## Checking hash(es) for Image atf_1 ... sha256 error! Bad hash value for 'hash' hash node in 'atf_1' image node mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Regards, Jonas > > Jagan.