From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.4 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF558C4338F for ; Fri, 30 Jul 2021 11:02:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 81B136101C for ; Fri, 30 Jul 2021 11:02:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238599AbhG3LCP (ORCPT ); Fri, 30 Jul 2021 07:02:15 -0400 Received: from foss.arm.com ([217.140.110.172]:40444 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238403AbhG3LCO (ORCPT ); Fri, 30 Jul 2021 07:02:14 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C4EE51FB; Fri, 30 Jul 2021 04:02:09 -0700 (PDT) Received: from [10.163.66.9] (unknown [10.163.66.9]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D78C13F73D; Fri, 30 Jul 2021 04:02:05 -0700 (PDT) Subject: Re: [PATCH 05/10] coresight: trbe: Allow driver to choose a different alignment To: Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, coresight@lists.linaro.org, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, mathieu.poirier@linaro.org, mike.leach@linaro.org, leo.yan@linaro.org, maz@kernel.org, mark.rutland@arm.com References: <20210728135217.591173-1-suzuki.poulose@arm.com> <20210728135217.591173-6-suzuki.poulose@arm.com> From: Anshuman Khandual Message-ID: <646d73c5-0015-d296-2ac8-63f8bd5a4dc0@arm.com> Date: Fri, 30 Jul 2021 16:32:54 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210728135217.591173-6-suzuki.poulose@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/28/21 7:22 PM, Suzuki K Poulose wrote: > The TRBE hardware mandates a minimum alignment for the TRBPTR_EL1, > advertised via the TRBIDR_EL1. This is used by the driver to > align the buffer write head. This patch allows the driver to > choose a different alignment from that of the hardware, by > decoupling the alignment tracking. This will be useful for > working around errata. > > Cc: Mathieu Poirier > Cc: Anshuman Khandual > Cc: Mike Leach > Cc: Leo Yan > Signed-off-by: Suzuki K Poulose > --- > drivers/hwtracing/coresight/coresight-trbe.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > index 9735d514c5e1..9ea28813182b 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.c > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > @@ -92,7 +92,8 @@ static unsigned long trbe_errata_cpucaps[TRBE_ERRATA_MAX] = { > /* > * struct trbe_cpudata: TRBE instance specific data > * @trbe_flag - TRBE dirty/access flag support > - * @tbre_align - Actual TRBE alignment required for TRBPTR_EL1. > + * @trbe_hw_align - Actual TRBE alignment required for TRBPTR_EL1. > + * @trbe_align - Software alignment used for the TRBPTR_EL1, > * @cpu - CPU this TRBE belongs to. > * @mode - Mode of current operation. (perf/disabled) > * @drvdata - TRBE specific drvdata > @@ -100,6 +101,7 @@ static unsigned long trbe_errata_cpucaps[TRBE_ERRATA_MAX] = { > */ > struct trbe_cpudata { > bool trbe_flag; > + u64 trbe_hw_align; > u64 trbe_align; > int cpu; > enum cs_mode mode; > @@ -906,7 +908,7 @@ static ssize_t align_show(struct device *dev, struct device_attribute *attr, cha > { > struct trbe_cpudata *cpudata = dev_get_drvdata(dev); > > - return sprintf(buf, "%llx\n", cpudata->trbe_align); > + return sprintf(buf, "%llx\n", cpudata->trbe_hw_align); > } > static DEVICE_ATTR_RO(align); > > @@ -995,11 +997,13 @@ static void arm_trbe_probe_cpu(void *info) > } > > trbe_check_errata(cpudata); > - cpudata->trbe_align = 1ULL << get_trbe_address_align(trbidr); > - if (cpudata->trbe_align > SZ_2K) { > + > + cpudata->trbe_hw_align = 1ULL << get_trbe_address_align(trbidr); > + if (cpudata->trbe_hw_align > SZ_2K) { > pr_err("Unsupported alignment on cpu %d\n", cpu); > goto cpu_clear; > } > + cpudata->trbe_align = cpudata->trbe_hw_align; When it changes, it must be asserted that trbe_align would be a multiple of trbe_hw_align before existing from arm_trbe_probe_cpu(). > cpudata->trbe_flag = get_trbe_flag_update(trbidr); > cpudata->cpu = cpu; > cpudata->drvdata = drvdata; > Reviewed-by: Anshuman Khandual From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C394EC4338F for ; Fri, 30 Jul 2021 11:04:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8637360F9B for ; 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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m9QHQ-008Egz-Vw; Fri, 30 Jul 2021 11:02:17 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m9QHM-008EdN-0r for linux-arm-kernel@lists.infradead.org; Fri, 30 Jul 2021 11:02:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C4EE51FB; Fri, 30 Jul 2021 04:02:09 -0700 (PDT) Received: from [10.163.66.9] (unknown [10.163.66.9]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D78C13F73D; Fri, 30 Jul 2021 04:02:05 -0700 (PDT) Subject: Re: [PATCH 05/10] coresight: trbe: Allow driver to choose a different alignment To: Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, coresight@lists.linaro.org, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, mathieu.poirier@linaro.org, mike.leach@linaro.org, leo.yan@linaro.org, maz@kernel.org, mark.rutland@arm.com References: <20210728135217.591173-1-suzuki.poulose@arm.com> <20210728135217.591173-6-suzuki.poulose@arm.com> From: Anshuman Khandual Message-ID: <646d73c5-0015-d296-2ac8-63f8bd5a4dc0@arm.com> Date: Fri, 30 Jul 2021 16:32:54 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210728135217.591173-6-suzuki.poulose@arm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210730_040212_217862_7AB31B13 X-CRM114-Status: GOOD ( 22.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 7/28/21 7:22 PM, Suzuki K Poulose wrote: > The TRBE hardware mandates a minimum alignment for the TRBPTR_EL1, > advertised via the TRBIDR_EL1. This is used by the driver to > align the buffer write head. This patch allows the driver to > choose a different alignment from that of the hardware, by > decoupling the alignment tracking. This will be useful for > working around errata. > > Cc: Mathieu Poirier > Cc: Anshuman Khandual > Cc: Mike Leach > Cc: Leo Yan > Signed-off-by: Suzuki K Poulose > --- > drivers/hwtracing/coresight/coresight-trbe.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > index 9735d514c5e1..9ea28813182b 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.c > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > @@ -92,7 +92,8 @@ static unsigned long trbe_errata_cpucaps[TRBE_ERRATA_MAX] = { > /* > * struct trbe_cpudata: TRBE instance specific data > * @trbe_flag - TRBE dirty/access flag support > - * @tbre_align - Actual TRBE alignment required for TRBPTR_EL1. > + * @trbe_hw_align - Actual TRBE alignment required for TRBPTR_EL1. > + * @trbe_align - Software alignment used for the TRBPTR_EL1, > * @cpu - CPU this TRBE belongs to. > * @mode - Mode of current operation. (perf/disabled) > * @drvdata - TRBE specific drvdata > @@ -100,6 +101,7 @@ static unsigned long trbe_errata_cpucaps[TRBE_ERRATA_MAX] = { > */ > struct trbe_cpudata { > bool trbe_flag; > + u64 trbe_hw_align; > u64 trbe_align; > int cpu; > enum cs_mode mode; > @@ -906,7 +908,7 @@ static ssize_t align_show(struct device *dev, struct device_attribute *attr, cha > { > struct trbe_cpudata *cpudata = dev_get_drvdata(dev); > > - return sprintf(buf, "%llx\n", cpudata->trbe_align); > + return sprintf(buf, "%llx\n", cpudata->trbe_hw_align); > } > static DEVICE_ATTR_RO(align); > > @@ -995,11 +997,13 @@ static void arm_trbe_probe_cpu(void *info) > } > > trbe_check_errata(cpudata); > - cpudata->trbe_align = 1ULL << get_trbe_address_align(trbidr); > - if (cpudata->trbe_align > SZ_2K) { > + > + cpudata->trbe_hw_align = 1ULL << get_trbe_address_align(trbidr); > + if (cpudata->trbe_hw_align > SZ_2K) { > pr_err("Unsupported alignment on cpu %d\n", cpu); > goto cpu_clear; > } > + cpudata->trbe_align = cpudata->trbe_hw_align; When it changes, it must be asserted that trbe_align would be a multiple of trbe_hw_align before existing from arm_trbe_probe_cpu(). > cpudata->trbe_flag = get_trbe_flag_update(trbidr); > cpudata->cpu = cpu; > cpudata->drvdata = drvdata; > Reviewed-by: Anshuman Khandual _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel