From: Julien Grall <julien.grall@arm.com>
To: Wei Chen <Wei.Chen@arm.com>, xen-devel@lists.xen.org
Cc: Kaly.Xin@arm.com, nd@arm.com, sstabellini@kernel.org,
steve.capper@arm.com
Subject: Re: [PATCH 05/18] xen/arm: Save ESR_EL2 to avoid using mismatched value in syndrome check
Date: Thu, 16 Mar 2017 13:50:08 +0000 [thread overview]
Message-ID: <65271340-e614-49d1-d110-55884686ee67@arm.com> (raw)
In-Reply-To: <1489402563-4978-6-git-send-email-Wei.Chen@arm.com>
Hi Wei,
On 03/13/2017 10:55 AM, Wei Chen wrote:
> Xen will do exception syndrome check while some types of exception
> take place in EL2. The syndrome check code read the ESR_EL2 register
> directly, but in some situation this register maybe overridden by
> nested exception.
>
> For example, if we re-enable IRQ before reading ESR_EL2 which means
> Xen will enter in IRQ exception mode and return the processor with
s/will/may/
> clobbered ESR_EL2 (See ARM ARM DDI 0487A.j D7.2.25)
>
> In this case the guest exception syndrome has been overridden, we will
> check the syndrome for guest sync exception with a mismatched ESR_EL2
s/mismatched/incorrect/ I think
> value. So we want to save ESR_EL2 to cpu_user_regs as soon as the
> exception takes place in EL2 to avoid using a mismatched syndrome value.
Ditto.
>
> Signed-off-by: Wei Chen <Wei.Chen@arm.com>
> ---
> xen/arch/arm/arm32/asm-offsets.c | 1 +
> xen/arch/arm/arm32/entry.S | 3 +++
> xen/arch/arm/arm64/asm-offsets.c | 1 +
> xen/arch/arm/arm64/entry.S | 13 +++++++++----
> xen/arch/arm/traps.c | 2 +-
> xen/include/asm-arm/arm32/processor.h | 2 +-
> xen/include/asm-arm/arm64/processor.h | 10 ++++++++--
> 7 files changed, 24 insertions(+), 8 deletions(-)
>
> diff --git a/xen/arch/arm/arm32/asm-offsets.c b/xen/arch/arm/arm32/asm-offsets.c
> index f8e6b53..5b543ab 100644
> --- a/xen/arch/arm/arm32/asm-offsets.c
> +++ b/xen/arch/arm/arm32/asm-offsets.c
> @@ -26,6 +26,7 @@ void __dummy__(void)
> OFFSET(UREGS_lr, struct cpu_user_regs, lr);
> OFFSET(UREGS_pc, struct cpu_user_regs, pc);
> OFFSET(UREGS_cpsr, struct cpu_user_regs, cpsr);
> + OFFSET(UREGS_hsr, struct cpu_user_regs, hsr);
>
> OFFSET(UREGS_LR_usr, struct cpu_user_regs, lr_usr);
> OFFSET(UREGS_SP_usr, struct cpu_user_regs, sp_usr);
> diff --git a/xen/arch/arm/arm32/entry.S b/xen/arch/arm/arm32/entry.S
> index 2a6f4f0..2187226 100644
> --- a/xen/arch/arm/arm32/entry.S
> +++ b/xen/arch/arm/arm32/entry.S
> @@ -23,6 +23,9 @@
> add r11, sp, #UREGS_kernel_sizeof+4; \
> str r11, [sp, #UREGS_sp]; \
> \
> + mrc CP32(r11, HSR); /* Save exception syndrome */ \
> + str r11, [sp, #UREGS_hsr]; \
> + \
> mrs r11, SPSR_hyp; \
> str r11, [sp, #UREGS_cpsr]; \
> and r11, #PSR_MODE_MASK; \
> diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c
> index 69ea92a..ce24e44 100644
> --- a/xen/arch/arm/arm64/asm-offsets.c
> +++ b/xen/arch/arm/arm64/asm-offsets.c
> @@ -27,6 +27,7 @@ void __dummy__(void)
> OFFSET(UREGS_SP, struct cpu_user_regs, sp);
> OFFSET(UREGS_PC, struct cpu_user_regs, pc);
> OFFSET(UREGS_CPSR, struct cpu_user_regs, cpsr);
> + OFFSET(UREGS_ESR_el2, struct cpu_user_regs, hsr);
>
> OFFSET(UREGS_SPSR_el1, struct cpu_user_regs, spsr_el1);
>
> diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S
> index c181b5e..02802c0 100644
> --- a/xen/arch/arm/arm64/entry.S
> +++ b/xen/arch/arm/arm64/entry.S
> @@ -121,9 +121,13 @@ lr .req x30 // link register
>
> stp lr, x21, [sp, #UREGS_LR]
>
> - mrs x22, elr_el2
> - mrs x23, spsr_el2
> - stp x22, x23, [sp, #UREGS_PC]
> + mrs x21, elr_el2
> + str x21, [sp, #UREGS_PC]
Please explain the commit message you modify the lines above ...
> +
> + add x21, sp, #UREGS_CPSR
> + mrs x22, spsr_el2
> + mrs x23, esr_el2
> + stp w22, w23, [x21]
>
> .endm
>
> @@ -307,7 +311,8 @@ ENTRY(return_to_new_vcpu64)
> return_from_trap:
> msr daifset, #2 /* Mask interrupts */
>
> - ldp x21, x22, [sp, #UREGS_PC] // load ELR, SPSR
> + ldr x21, [sp, #UREGS_PC] // load ELR
> + ldr w22, [sp, #UREGS_CPSR] // load SPSR
as long as those one.
>
> pop x0, x1
> pop x2, x3
[...]
> diff --git a/xen/include/asm-arm/arm64/processor.h b/xen/include/asm-arm/arm64/processor.h
> index b0726ff..d381428 100644
> --- a/xen/include/asm-arm/arm64/processor.h
> +++ b/xen/include/asm-arm/arm64/processor.h
> @@ -65,9 +65,15 @@ struct cpu_user_regs
>
> /* Return address and mode */
> __DECL_REG(pc, pc32); /* ELR_EL2 */
> + /*
> + * Be careful for 32-bit registers, if we use xN to save 32-bit register
> + * to stack, its next field on stack will be overridden.
> + * For example, if we use xN to save SPSR_EL2 to stack will override the
> + * hsr field on stack.
> + * So, it's better to use wN to save 32-bit registers to stack.
> + */
This comment is pointless. This is true for any 32-bit register, you
should use wN unless you now that you have a padding after.
> uint32_t cpsr; /* SPSR_EL2 */
> -
> - uint32_t pad0; /* Align end of kernel frame. */
> + uint32_t hsr; /* ESR_EL2 */
>
> /* Outer guest frame only from here on... */
>
>
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2017-03-16 13:50 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-13 10:55 [PATCH 00/18] Provide a command line option to choose how to handle SErrors Wei Chen
2017-03-13 10:55 ` [PATCH 01/18] xen/arm: Introduce a helper to get default HCR_EL2 flags Wei Chen
2017-03-15 0:24 ` Stefano Stabellini
2017-03-15 7:19 ` Wei Chen
2017-03-15 11:01 ` Julien Grall
2017-03-15 22:31 ` Stefano Stabellini
2017-03-16 7:44 ` Wei Chen
2017-03-13 10:55 ` [PATCH 02/18] xen/arm: Restore HCR_EL2 register Wei Chen
2017-03-15 0:25 ` Stefano Stabellini
2017-03-15 8:34 ` Wei Chen
2017-03-15 11:12 ` Julien Grall
2017-03-16 7:51 ` Wei Chen
2017-03-16 22:33 ` Stefano Stabellini
2017-03-16 22:46 ` Julien Grall
2017-03-21 0:31 ` Stefano Stabellini
2017-03-22 12:16 ` Julien Grall
2017-03-22 12:45 ` Mark Rutland
2017-03-22 13:41 ` Marc Zyngier
2017-03-22 17:54 ` Stefano Stabellini
2017-03-22 18:04 ` Julien Grall
2017-03-22 18:30 ` Mark Rutland
2017-03-22 22:06 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 03/18] xen/arm: Avoid setting/clearing HCR_RW at every context switch Wei Chen
2017-03-15 0:25 ` Stefano Stabellini
2017-03-15 9:08 ` Wei Chen
2017-03-16 22:40 ` Stefano Stabellini
2017-03-16 22:52 ` Julien Grall
2017-03-16 23:17 ` Stefano Stabellini
2017-03-17 6:51 ` Wei Chen
2017-03-17 7:05 ` Julien Grall
2017-03-17 17:46 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 04/18] xen/arm: Save HCR_EL2 when a guest took the SError Wei Chen
2017-03-15 0:27 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 05/18] xen/arm: Save ESR_EL2 to avoid using mismatched value in syndrome check Wei Chen
2017-03-16 13:50 ` Julien Grall [this message]
2017-03-16 22:27 ` Stefano Stabellini
2017-03-17 6:37 ` Wei Chen
2017-03-17 6:37 ` Wei Chen
2017-03-13 10:55 ` [PATCH 06/18] xen/arm: Introduce a virtual abort injection helper Wei Chen
2017-03-15 0:31 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 07/18] xen/arm: Introduce a command line parameter for SErrors/Aborts Wei Chen
2017-03-15 0:45 ` Stefano Stabellini
2017-03-15 9:13 ` Wei Chen
2017-03-13 10:55 ` [PATCH 08/18] xen/arm: Introduce a initcall to update cpu_hwcaps by serror_op Wei Chen
2017-03-16 23:30 ` Stefano Stabellini
2017-03-17 6:56 ` Wei Chen
2017-03-17 17:21 ` Stefano Stabellini
2017-03-20 6:48 ` Wei Chen
2017-03-13 10:55 ` [PATCH 09/18] xen/arm64: Use alternative to skip the check of pending serrors Wei Chen
2017-03-16 23:40 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 10/18] xen/arm32: Use cpu_hwcaps " Wei Chen
2017-03-16 23:44 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 11/18] xen/arm: Move macro VABORT_GEN_BY_GUEST to common header Wei Chen
2017-03-16 23:53 ` Stefano Stabellini
2017-03-17 6:57 ` Wei Chen
2017-03-13 10:55 ` [PATCH 12/18] xen/arm: Introduce new helpers to handle guest/hyp SErrors Wei Chen
2017-03-17 0:17 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 13/18] xen/arm: Replace do_trap_guest_serror with new helpers Wei Chen
2017-03-17 0:15 ` Stefano Stabellini
2017-03-13 10:55 ` [PATCH 14/18] xen/arm: Unmask the Abort/SError bit in the exception entries Wei Chen
2017-03-20 21:38 ` Stefano Stabellini
2017-03-22 8:49 ` Wei Chen
2017-03-22 12:26 ` Julien Grall
2017-03-22 22:21 ` Stefano Stabellini
2017-03-23 3:13 ` Wei Chen
2017-03-23 19:12 ` Julien Grall
2017-03-24 0:10 ` Stefano Stabellini
2017-03-24 8:11 ` Wei Chen
2017-03-24 16:56 ` Stefano Stabellini
2017-03-13 10:56 ` [PATCH 15/18] xen/arm: Introduce a helper to synchronize SError Wei Chen
2017-03-20 21:40 ` Stefano Stabellini
2017-03-20 21:44 ` Stefano Stabellini
2017-03-22 8:28 ` Wei Chen
2017-03-13 10:56 ` [PATCH 16/18] xen/arm: Isolate the SError between the context switch of 2 vCPUs Wei Chen
2017-03-20 21:46 ` Stefano Stabellini
2017-03-22 8:53 ` Wei Chen
2017-03-22 12:29 ` Julien Grall
2017-03-23 6:32 ` Wei Chen
2017-03-23 18:49 ` Stefano Stabellini
2017-03-13 10:56 ` [PATCH 17/18] xen/arm: Prevent slipping hypervisor SError to guest Wei Chen
2017-03-20 21:49 ` Stefano Stabellini
2017-03-13 10:56 ` [PATCH 18/18] xen/arm: Handle guest external abort as guest SError Wei Chen
2017-03-20 21:53 ` Stefano Stabellini
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