From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=39191 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OuNDk-00028G-V2 for qemu-devel@nongnu.org; Sat, 11 Sep 2010 06:22:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OuNDj-0003tz-P1 for qemu-devel@nongnu.org; Sat, 11 Sep 2010 06:22:08 -0400 Received: from fmmailgate02.web.de ([217.72.192.227]:55509) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OuNDj-0003tq-Dz for qemu-devel@nongnu.org; Sat, 11 Sep 2010 06:22:07 -0400 Message-Id: <65D10BD5-0327-4C5D-8AAC-DF98FF2FE34D@web.de> From: =?ISO-8859-1?Q?Andreas_F=E4rber?= In-Reply-To: <1284167314-11594-2-git-send-email-agraf@suse.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed; delsp=yes Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Apple Message framework v936) Subject: Re: [Qemu-devel] [PATCH 1/2] PPC: Enable hint bits for lwarx/ldarx Date: Sat, 11 Sep 2010 12:21:44 +0200 References: <1284167314-11594-1-git-send-email-agraf@suse.de> <1284167314-11594-2-git-send-email-agraf@suse.de> Sender: andreas.faerber@web.de List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Thomas Monjalon , "Edgar E. Iglesias" , QEMU Developers Am 11.09.2010 um 03:08 schrieb Alexander Graf: > The lwarx and ldarx instructions have a bit to give some hint to the > CPU which is safe to ignore. We currently refuse to accept any =20 > instruction > with that bit set, as it used to be declared MBZ. > > Let's remove the reserved bit and make the instruction work as =20 > expected. > This fixes Linux boot for ppc64. > > Signed-off-by: Alexander Graf Reviewed-by: Andreas F=E4rber Matches my reading of Power ISA 2.06. Andreas > --- > target-ppc/translate.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index 95ab0a1..fd06861 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -8048,10 +8048,10 @@ GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, =20 > 0x00000001, PPC_STRING), > GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING), > GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO), > GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM), > -GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES), > +GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES), > GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES), > #if defined(TARGET_PPC64) > -GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B), > +GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B), > GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B), > #endif > GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC), > --=20 > 1.6.0.2