On 9/29/20 1:07 PM, Magnus Aagaard Sørensen wrote:
> This is my first post to the list, so please inform me of any errors in 
> etiquette.

:D

> I'm evaluating the MCP2518FD, and have two questions to the driver.
> 
> 1. I could not find any references to the GPIOs of the chip. Is it 
> correct that these are not exposed to the host system?

ACK, gpio support is not implemented yet. Drop me a note, if you need it.

> 2. When setting the oscillator frequency outside the 
> MCP25XXFD_SYSCLOCK_HZ_MIN and MCP25XXFD_SYSCLOCK_HZ_MAX range, the 
> frequency is compared to the max value scaled by the max PLL value. Is 
> the intention to compare with the min value? Currently, an external 
> oscillator of 4 MHz and a PLL value of 10, resulting in 40 MHz, is 
> treated as being too low.

This is intended. I have no hardware with a 4MHz osc to test, so I decided to
not support the 4MHz osc for now. If you design new hardware I suggest to use a
40MHz osc, as probably no one has tested the hardware thoroughly in the PLL
mode. If you need 4MHz support, it can be added, given there is hardware.

> diff --git a/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c 
> b/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c
> index bd2ba981ae36..9e0246c4e49f 100644
> --- a/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c
> +++ b/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c
> @@ -2770,7 +2770,7 @@ static int mcp25xxfd_probe(struct spi_device *spi)
>           return -ERANGE;
>       }
> 
> -    if (freq <= MCP25XXFD_SYSCLOCK_HZ_MAX / MCP25XXFD_OSC_PLL_MULTIPLIER) {
> +    if (freq <= MCP25XXFD_SYSCLOCK_HZ_MIN / MCP25XXFD_OSC_PLL_MULTIPLIER) {
>           dev_err(&spi->dev,
>               "Oscillator frequency (%u Hz) is too low and PLL is not 
> supported.\n",
>               freq);

Hope that helps.

regards,
Marc

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