Re: [PATCH] watchdog: sbsa: Support architecture version 1

From: Guenter Roeck <linux@roeck-us.net>
To: Shaokun Zhang <zhangshaokun@hisilicon.com>,
	linux-watchdog@vger.kernel.org
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
	Al Stone <al.stone@linaro.org>,
	Jianchao Hu <hujianchao@hisilicon.com>,
	Huiqiang Wang <wanghuiqiang@huawei.com>
Subject: Re: [PATCH] watchdog: sbsa: Support architecture version 1
Date: Mon, 10 May 2021 06:16:19 -0700	[thread overview]
Message-ID: <669e1175-2eee-6c4b-8524-c672626022b6@roeck-us.net> (raw)
In-Reply-To: <bf9e1b65-119b-d027-fc3d-8491cbc38cde@hisilicon.com>

On 5/10/21 1:25 AM, Shaokun Zhang wrote:
> Hi Guenter,
> 
> On 2021/5/10 12:25, Guenter Roeck wrote:
>> On 5/9/21 8:41 PM, Shaokun Zhang wrote:
>>> Arm Base System Architecture 1.0[1] has introduced watchdog
>>> revision 1 that increases the length the watchdog offset
>>
>> Is that how they call the watchdog count register ?
>>
> 
> I think yes.
> 
>> Also, doesn't that mean that the maximum timeout supported
>> by the hardware is now larger ?
> 
> No, maximum timeout is the same. But the clock can be higher than
> before. For Armv8.6, The frequency of CNTFRQ_EL0 is standardized to
> a frequency of 1GHz which will set gwdt->clk. If the timeout is
> greater than 4(second), the 32-bit counter(WOR) is not enough.
> 

The maximuma timeout is limited with

wdd->max_hw_heartbeat_ms = U32_MAX / gwdt->clk * 1000;

You did not update that calculation. That means that the maximuma
timeout is still U32_MAX / gwdt->clk * 1000, which still fits
into 32 bit.

Please correct me if I am missing something.

Guenter