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spf=pass smtp.mailfrom=driverdev-devel-bounces@linuxdriverproject.org smtp.helo=fraxinus.osuosl.org; x-aligned-from=fail; x-category=clean score=-100 state=0; x-google-dkim=fail (message has been altered; 2048-bit rsa key) header.d=1e100.net header.i=@1e100.net header.b=isjhVe1R; x-ptr=fail x-ptr-helo=fraxinus.osuosl.org x-ptr-lookup=smtp4.osuosl.org; x-return-mx=pass smtp.domain=linuxdriverproject.org smtp.result=pass smtp_is_org_domain=yes header.domain=gmail.com header.result=pass header_is_org_domain=yes; x-tls=pass version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128 X-Remote-Delivered-To: driverdev-devel@osuosl.org X-Google-Smtp-Source: AG47ELsFN5tTN3nXG/9DY/YBznd+cof6DBTnTOe/OjwLHHpt5H/2oAwixraxiFYPuGDaIYGPatq7pg== Date: Fri, 16 Mar 2018 19:49:24 -0300 From: Rodrigo Siqueira To: John Syne , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Greg Kroah-Hartman , linux-iio@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Barry Song <21cnbao@gmail.com> Subject: [PATCH v2 4/8] staging:iio:ade7854: Rework SPI write function Message-ID: <66ce9378178c994eb64d19ba3cccc5dbfc64e0ef.1521239766.git.rodrigosiqueiramelo@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180223 X-BeenThere: driverdev-devel@linuxdriverproject.org X-Mailman-Version: 2.1.24 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-iio@vger.kernel.org, devel@driverdev.osuosl.org, daniel.baluta@nxp.com, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: driverdev-devel-bounces@linuxdriverproject.org Sender: "devel" X-getmail-retrieved-from-mailbox: INBOX X-Mailing-List: linux-kernel@vger.kernel.org List-ID: The write operation using SPI has a many code duplications (similar to I2C) and four different interfaces per data size. This patch introduces a single function that centralizes the main task related to SPI. Signed-off-by: Rodrigo Siqueira --- drivers/staging/iio/meter/ade7854-spi.c | 108 ++++++++++++-------------------- 1 file changed, 41 insertions(+), 67 deletions(-) diff --git a/drivers/staging/iio/meter/ade7854-spi.c b/drivers/staging/iio/meter/ade7854-spi.c index 4419b8f06197..f21dc24194fb 100644 --- a/drivers/staging/iio/meter/ade7854-spi.c +++ b/drivers/staging/iio/meter/ade7854-spi.c @@ -15,9 +15,10 @@ #include #include "ade7854.h" -static int ade7854_spi_write_reg_8(struct device *dev, - u16 reg_address, - u8 val) +static int ade7854_spi_write_reg(struct device *dev, + u16 reg_address, + u32 val, + int bytes) { int ret; struct iio_dev *indio_dev = dev_to_iio_dev(dev); @@ -32,93 +33,66 @@ static int ade7854_spi_write_reg_8(struct device *dev, st->tx[0] = ADE7854_WRITE_REG; st->tx[1] = (reg_address >> 8) & 0xFF; st->tx[2] = reg_address & 0xFF; - st->tx[3] = val & 0xFF; + switch (bytes) { + case DATA_SIZE_8_BITS: + st->tx[3] = val & 0xFF; + break; + case DATA_SIZE_16_BITS: + xfer.len = 5; + st->tx[3] = (val >> 8) & 0xFF; + st->tx[4] = val & 0xFF; + break; + case DATA_SIZE_24_BITS: + xfer.len = 6; + st->tx[3] = (val >> 16) & 0xFF; + st->tx[4] = (val >> 8) & 0xFF; + st->tx[5] = val & 0xFF; + break; + case DATA_SIZE_32_BITS: + xfer.len = 7; + st->tx[3] = (val >> 24) & 0xFF; + st->tx[4] = (val >> 16) & 0xFF; + st->tx[5] = (val >> 8) & 0xFF; + st->tx[6] = val & 0xFF; + break; + default: + ret = -EINVAL; + goto unlock; + } ret = spi_sync_transfer(st->spi, &xfer, 1); +unlock: mutex_unlock(&st->buf_lock); return ret; } +static int ade7854_spi_write_reg_8(struct device *dev, + u16 reg_address, + u8 val) +{ + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_8_BITS); +} + static int ade7854_spi_write_reg_16(struct device *dev, u16 reg_address, u16 val) { - int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 5, - }; - - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 8) & 0xFF; - st->tx[4] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); - - return ret; + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_16_BITS); } static int ade7854_spi_write_reg_24(struct device *dev, u16 reg_address, u32 val) { - int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 6, - }; - - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 16) & 0xFF; - st->tx[4] = (val >> 8) & 0xFF; - st->tx[5] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); - - return ret; + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_24_BITS); } static int ade7854_spi_write_reg_32(struct device *dev, u16 reg_address, u32 val) { - int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 7, - }; - - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 24) & 0xFF; - st->tx[4] = (val >> 16) & 0xFF; - st->tx[5] = (val >> 8) & 0xFF; - st->tx[6] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); - - return ret; + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_32_BITS); } static int ade7854_spi_read_reg_8(struct device *dev, -- 2.16.2 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Fri, 16 Mar 2018 19:49:24 -0300 From: Rodrigo Siqueira To: John Syne , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Greg Kroah-Hartman , linux-iio@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Barry Song <21cnbao@gmail.com> Cc: daniel.baluta@nxp.com, linux-iio@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/8] staging:iio:ade7854: Rework SPI write function Message-ID: <66ce9378178c994eb64d19ba3cccc5dbfc64e0ef.1521239766.git.rodrigosiqueiramelo@gmail.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: List-ID: The write operation using SPI has a many code duplications (similar to I2C) and four different interfaces per data size. This patch introduces a single function that centralizes the main task related to SPI. Signed-off-by: Rodrigo Siqueira --- drivers/staging/iio/meter/ade7854-spi.c | 108 ++++++++++++-------------------- 1 file changed, 41 insertions(+), 67 deletions(-) diff --git a/drivers/staging/iio/meter/ade7854-spi.c b/drivers/staging/iio/meter/ade7854-spi.c index 4419b8f06197..f21dc24194fb 100644 --- a/drivers/staging/iio/meter/ade7854-spi.c +++ b/drivers/staging/iio/meter/ade7854-spi.c @@ -15,9 +15,10 @@ #include #include "ade7854.h" -static int ade7854_spi_write_reg_8(struct device *dev, - u16 reg_address, - u8 val) +static int ade7854_spi_write_reg(struct device *dev, + u16 reg_address, + u32 val, + int bytes) { int ret; struct iio_dev *indio_dev = dev_to_iio_dev(dev); @@ -32,93 +33,66 @@ static int ade7854_spi_write_reg_8(struct device *dev, st->tx[0] = ADE7854_WRITE_REG; st->tx[1] = (reg_address >> 8) & 0xFF; st->tx[2] = reg_address & 0xFF; - st->tx[3] = val & 0xFF; + switch (bytes) { + case DATA_SIZE_8_BITS: + st->tx[3] = val & 0xFF; + break; + case DATA_SIZE_16_BITS: + xfer.len = 5; + st->tx[3] = (val >> 8) & 0xFF; + st->tx[4] = val & 0xFF; + break; + case DATA_SIZE_24_BITS: + xfer.len = 6; + st->tx[3] = (val >> 16) & 0xFF; + st->tx[4] = (val >> 8) & 0xFF; + st->tx[5] = val & 0xFF; + break; + case DATA_SIZE_32_BITS: + xfer.len = 7; + st->tx[3] = (val >> 24) & 0xFF; + st->tx[4] = (val >> 16) & 0xFF; + st->tx[5] = (val >> 8) & 0xFF; + st->tx[6] = val & 0xFF; + break; + default: + ret = -EINVAL; + goto unlock; + } ret = spi_sync_transfer(st->spi, &xfer, 1); +unlock: mutex_unlock(&st->buf_lock); return ret; } +static int ade7854_spi_write_reg_8(struct device *dev, + u16 reg_address, + u8 val) +{ + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_8_BITS); +} + static int ade7854_spi_write_reg_16(struct device *dev, u16 reg_address, u16 val) { - int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 5, - }; - - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 8) & 0xFF; - st->tx[4] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); - - return ret; + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_16_BITS); } static int ade7854_spi_write_reg_24(struct device *dev, u16 reg_address, u32 val) { - int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 6, - }; - - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 16) & 0xFF; - st->tx[4] = (val >> 8) & 0xFF; - st->tx[5] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); - - return ret; + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_24_BITS); } static int ade7854_spi_write_reg_32(struct device *dev, u16 reg_address, u32 val) { - int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 7, - }; - - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 24) & 0xFF; - st->tx[4] = (val >> 16) & 0xFF; - st->tx[5] = (val >> 8) & 0xFF; - st->tx[6] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); - - return ret; + return ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_32_BITS); } static int ade7854_spi_read_reg_8(struct device *dev, -- 2.16.2