From: peter.crosthwaite@xilinx.com
To: peter.maydell@linaro.org, qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com
Subject: [Qemu-devel] [PATCH arm-devs v4 06/15] xilinx_spips: Trash LQ page cache on mode change
Date: Tue, 21 May 2013 16:32:59 +1000 [thread overview]
Message-ID: <677490a6ee1953fe5d366e599d665de645ac84db.1369117359.git.peter.crosthwaite@xilinx.com> (raw)
In-Reply-To: <cover.1369117359.git.peter.crosthwaite@xilinx.com>
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Invalidate the LQSPI cached page when transitioning into LQSPI mode.
Otherwise there is a possibility that the controller will return stale
data to the guest when transitioning back to LQ_MODE after a page
program.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
changed from v2:
Removed extraneous break after goto (PMM review)
changed from v1:
Re-implemented using separate SPI/QSPI write handlers.
hw/ssi/xilinx_spips.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 86f33ef..cf4c43e 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -165,6 +165,8 @@ typedef struct {
typedef struct XilinxSPIPSClass {
SysBusDeviceClass parent_class;
+ const MemoryRegionOps *reg_ops;
+
uint32_t rx_fifo_size;
uint32_t tx_fifo_size;
} XilinxSPIPSClass;
@@ -462,6 +464,25 @@ static const MemoryRegionOps spips_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static void xilinx_qspips_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ XilinxQSPIPS *q = XILINX_QSPIPS(opaque);
+
+ xilinx_spips_write(opaque, addr, value, size);
+ addr >>= 2;
+
+ if (addr == R_LQSPI_CFG) {
+ q->lqspi_cached_addr = ~0ULL;
+ }
+}
+
+static const MemoryRegionOps qspips_ops = {
+ .read = xilinx_spips_read,
+ .write = xilinx_qspips_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
#define LQSPI_CACHE_SIZE 1024
static uint64_t
@@ -565,7 +586,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->cs_lines[i]);
}
- memory_region_init_io(&s->iomem, &spips_ops, s, "spi", R_MAX*4);
+ memory_region_init_io(&s->iomem, xsc->reg_ops, s, "spi", R_MAX*4);
sysbus_init_mmio(sbd, &s->iomem);
s->irqline = -1;
@@ -629,6 +650,7 @@ static void xilinx_qspips_class_init(ObjectClass *klass, void * data)
XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass);
dc->realize = xilinx_qspips_realize;
+ xsc->reg_ops = &qspips_ops;
xsc->rx_fifo_size = RXFF_A_Q;
xsc->tx_fifo_size = TXFF_A_Q;
}
@@ -643,6 +665,7 @@ static void xilinx_spips_class_init(ObjectClass *klass, void *data)
dc->props = xilinx_spips_properties;
dc->vmsd = &vmstate_xilinx_spips;
+ xsc->reg_ops = &spips_ops;
xsc->rx_fifo_size = RXFF_A;
xsc->tx_fifo_size = TXFF_A;
}
--
1.8.3.rc1.44.gb387c77.dirty
next prev parent reply other threads:[~2013-05-21 6:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-21 6:28 [Qemu-devel] [PATCH arm-devs v4 00/15] Xilinx SPIPS fixes round 2 peter.crosthwaite
2013-05-21 6:29 ` [Qemu-devel] [PATCH arm-devs v4 01/15] xilinx_spips: seperate SPI and QSPI as two classes peter.crosthwaite
2013-05-21 6:30 ` [Qemu-devel] [PATCH arm-devs v4 02/15] xilinx_spips: Make interrupts clear on read peter.crosthwaite
2013-05-21 6:30 ` [Qemu-devel] [PATCH arm-devs v4 03/15] xilinx_spips: Inhibit interrupts in LQSPI mode peter.crosthwaite
2013-05-21 6:31 ` [Qemu-devel] [PATCH arm-devs v4 04/15] xilinx_spips: Add verbose LQSPI debug output peter.crosthwaite
2013-05-21 6:32 ` [Qemu-devel] [PATCH arm-devs v4 05/15] xilinx_spips: Fix QSPI FIFO size peter.crosthwaite
2013-05-21 6:32 ` peter.crosthwaite [this message]
2013-05-21 6:33 ` [Qemu-devel] [PATCH arm-devs v4 07/15] xilinx_spips: Add automatic start support peter.crosthwaite
2013-05-21 6:34 ` [Qemu-devel] [PATCH arm-devs v4 08/15] xilinx_spips: Implement automatic CS peter.crosthwaite
2013-05-21 6:35 ` [Qemu-devel] [PATCH arm-devs v4 09/15] xilinx_spips: lqspi: Dont touch config register peter.crosthwaite
2013-05-21 6:35 ` [Qemu-devel] [PATCH arm-devs v4 10/15] xilinx_spips: Fix CTRL register RW bits peter.crosthwaite
2013-05-21 6:36 ` [Qemu-devel] [PATCH arm-devs v4 11/15] xilinx_spips: Fix striping behaviour peter.crosthwaite
2013-05-21 6:37 ` [Qemu-devel] [PATCH arm-devs v4 12/15] xilinx_spips: Debug msgs for Snoop state peter.crosthwaite
2013-05-21 6:38 ` [Qemu-devel] [PATCH arm-devs v4 13/15] xilinx_spips: Multiple debug verbosity levels peter.crosthwaite
2013-05-21 6:38 ` [Qemu-devel] [PATCH arm-devs v4 14/15] xilinx_spips: lqspi: Push more data to tx-fifo peter.crosthwaite
2013-05-21 6:39 ` [Qemu-devel] [PATCH arm-devs v4 15/15] xilinx_spips: lqspi: Fix byte/misaligned access peter.crosthwaite
2013-05-24 12:57 ` [Qemu-devel] [PATCH arm-devs v4 00/15] Xilinx SPIPS fixes round 2 Peter Maydell
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