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References: <20190416125744.27770-1-peter.maydell@linaro.org>
	<20190416125744.27770-13-peter.maydell@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <67aeb166-5e80-668a-33aa-3c556a843ecd@linaro.org>
Date: Tue, 23 Apr 2019 15:50:31 -0700
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Subject: Re: [Qemu-devel] [PATCH 12/26] target/arm: Clear CONTROL.SFPA in
 BXNS and BLXNS
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org, qemu-devel@nongnu.org

On 4/16/19 5:57 AM, Peter Maydell wrote:
> For v8M floating point support, transitions from Secure
> to Non-secure state via BLNS and BLXNS must clear the
> CONTROL.SFPA bit. (This corresponds to the pseudocode
> BranchToNS() function.)
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target/arm/helper.c | 4 ++++
>  1 file changed, 4 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~