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from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 70FC14D; Thu, 7 Mar 2019 17:24:36 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 46D6F562D; Thu, 7 Mar 2019 17:24:36 +0000 (GMT) Received: from SFHDAG5NODE3.st.com (10.75.127.15) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 7 Mar 2019 18:24:35 +0100 Received: from SFHDAG5NODE3.st.com ([fe80::7c09:5d6b:d2c7:5f47]) by SFHDAG5NODE3.st.com ([fe80::7c09:5d6b:d2c7:5f47%20]) with mapi id 15.00.1347.000; Thu, 7 Mar 2019 18:24:35 +0100 From: Fabien DESSENNE To: Marc Zyngier , Thomas Gleixner , Jason Cooper , Maxime Coquelin , Alexandre TORGUE , "linux-kernel@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH] irqchip: stm32: don't set rising configuration registers at init Thread-Topic: [PATCH] irqchip: stm32: don't set rising configuration registers at init Thread-Index: AQHU1QD7RMigUJWrgUiPC0+O3u7LzKYATfOAgAAbASA= Date: Thu, 7 Mar 2019 17:24:35 +0000 Message-ID: <6817f02f47b4436cb9911371f91523ba@SFHDAG5NODE3.st.com> References: <1551975317-5171-1-git-send-email-fabien.dessenne@st.com> <6ee8e9dc-f331-7bc9-64e2-8978ab17aed1@arm.com> In-Reply-To: <6ee8e9dc-f331-7bc9-64e2-8978ab17aed1@arm.com> Accept-Language: fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.50] MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-07_09:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190307_092447_374299_3CDB1EE9 X-CRM114-Status: GOOD ( 18.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin GAIGNARD Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi > -----Original Message----- > From: Marc Zyngier > Sent: jeudi 7 mars 2019 17:40 > To: Fabien DESSENNE ; Thomas Gleixner > ; Jason Cooper ; Maxime Coquelin > ; Alexandre TORGUE > ; linux-kernel@vger.kernel.org; linux-stm32@st-md- > mailman.stormreply.com; linux-arm-kernel@lists.infradead.org > Cc: Benjamin GAIGNARD > Subject: Re: [PATCH] irqchip: stm32: don't set rising configuration registers at init > > On 07/03/2019 16:15, Fabien Dessenne wrote: > > The rising configuration status register (rtsr) is not banked. > > As it is shared with the co-processor, it should not be written at > > probe time, else the co-processor configuration will be lost. > > > > Signed-off-by: Fabien Dessenne > > Fixes:? > > > --- > > drivers/irqchip/irq-stm32-exti.c | 5 ----- > > 1 file changed, 5 deletions(-) > > > > diff --git a/drivers/irqchip/irq-stm32-exti.c > > b/drivers/irqchip/irq-stm32-exti.c > > index 6edfd4b..ff8a84f 100644 > > --- a/drivers/irqchip/irq-stm32-exti.c > > +++ b/drivers/irqchip/irq-stm32-exti.c > > @@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct > stm32_exti_host_data *h_data, > > const struct stm32_exti_bank *stm32_bank; > > struct stm32_exti_chip_data *chip_data; > > void __iomem *base = h_data->base; > > - u32 irqs_mask; > > > > stm32_bank = h_data->drv_data->exti_banks[bank_idx]; > > chip_data = &h_data->chips_data[bank_idx]; @@ -725,10 +724,6 @@ > > stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data > > *h_data, > > > > raw_spin_lock_init(&chip_data->rlock); > > > > - /* Determine number of irqs supported */ > > - writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst); > > - irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst); > > - > > And I guess you don't need to find out the number of supported IRQs? That's correct, this informed is useless : irqs_mask is never used (it used to be output in a log for debug purpose.and the log has been removed) > > Also, a handful of lines down, you're writing again to the same register. Why isn't > that a problem? It's obviously a problem : another patch is missing, I am going to add it in v2. Thanks for pointing this out! > > > /* > > * This IP has no reset, so after hot reboot we should > > * clear registers to avoid residue > > > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel