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From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@c-sky.com>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org
Subject: Re: [PATCH 3/4] target/arm: Fixup SIMD fcmla(by element) in 4H arrangement
Date: Tue, 8 Dec 2020 15:04:16 -0600	[thread overview]
Message-ID: <689477ae-0758-01d4-f0e2-d4024537527d@linaro.org> (raw)
In-Reply-To: <20201207044655.2312-4-zhiwei_liu@c-sky.com>

On 12/6/20 10:46 PM, LIU Zhiwei wrote:
> For SIMD fcmla(by element), if the number of elements is less than
> the number of elements within one segment,i.e. 4H arrangement,
> we should not calculate the entire segment.
> 
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> ---
>  target/arm/vec_helper.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c
> index 7174030377..44b8165323 100644
> --- a/target/arm/vec_helper.c
> +++ b/target/arm/vec_helper.c
> @@ -544,6 +544,10 @@ void HELPER(gvec_fcmlah_idx)(void *vd, void *vn, void *vm,
>      neg_real <<= 15;
>      neg_imag <<= 15;
>  
> +    /* Adjust eltspersegment for simd 4H */
> +    if (eltspersegment > elements) {
> +        eltspersegment = elements;
> +    }

Ok.  Maybe better to fold this back to the initialization using MIN.

>      for (i = 0; i < elements; i += eltspersegment) {
>          float16 mr = m[H2(i + 2 * index + 0)];
>          float16 mi = m[H2(i + 2 * index + 1)];
> @@ -610,6 +614,10 @@ void HELPER(gvec_fcmlas_idx)(void *vd, void *vn, void *vm,
>      neg_real <<= 31;
>      neg_imag <<= 31;
>  
> +    /* Adjust eltspersegment for simd 4H */
> +    if (eltspersegment > elements) {
> +        eltspersegment = elements;
> +    }

Incorrect: this function only computes 4S.

>      for (i = 0; i < elements; i += eltspersegment) {
>          float32 mr = m[H4(i + 2 * index + 0)];
>          float32 mi = m[H4(i + 2 * index + 1)];
> 


r~


  reply	other threads:[~2020-12-08 21:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-07  4:46 [PATCH 0/4] target/arm bug fix LIU Zhiwei
2020-12-07  4:46 ` [PATCH 1/4] target/arm: Fixup special cross page case for sve continuous load/store LIU Zhiwei
2020-12-08 20:13   ` Richard Henderson
2020-12-07  4:46 ` [PATCH 2/4] target/arm: Fixup contiguous first-fault and no-fault loads LIU Zhiwei
2020-12-08 20:16   ` Richard Henderson
2020-12-10 11:54     ` LIU Zhiwei
2020-12-07  4:46 ` [PATCH 3/4] target/arm: Fixup SIMD fcmla(by element) in 4H arrangement LIU Zhiwei
2020-12-08 21:04   ` Richard Henderson [this message]
2020-12-07  4:46 ` [PATCH 4/4] target/arm: adjust CPTR_EL2 according to HCR_EL2.E2H LIU Zhiwei
2020-12-08 20:58   ` Richard Henderson

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