From: Jan Beulich <jbeulich@suse.com>
To: Roger Pau Monne <roger.pau@citrix.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
Paul Durrant <paul@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH] x86/dpci: EOI interrupt regardless of it's masking status
Date: Wed, 6 Jan 2021 12:22:03 +0100 [thread overview]
Message-ID: <696e5198-9634-bf5f-d870-99614aeb5c2a@suse.com> (raw)
In-Reply-To: <20210105183143.94547-1-roger.pau@citrix.com>
On 05.01.2021 19:31, Roger Pau Monne wrote:
> Modify hvm_pirq_eoi to always EOI the interrupt if required, instead
> of not doing such EOI if the interrupt is routed through the vIO-APIC
> and the entry is masked at the time the EOI is performed.
>
> Further unmask of the vIO-APIC pin won't EOI the interrupt, and thus
> the guest OS has to wait for the timeout to expire and the automatic
> EOI to be performed.
>
> This allows to simplify the helpers and drop the vioapic_redir_entry
> parameter from all of them.
>
> Fixes: ccfe4e08455 ('Intel vt-d specific changes in arch/x86/hvm/vmx/vtd.')
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
> ---
> Kind of RFC, I've been trying to figure out how this was supposed to
> work, and couldn't find any reason why the EOI is not performed if the
> interrupt is masked on the emulated IO-APIC. I might be missing
> something, but relying on the EOI timeout in that case seems wrong.
Fully agree. If archeology didn't surface an explanation, I'd
assume the dependency was put in mistakenly, perhaps because
most other operations need to respect the mask bit.
Jan
next prev parent reply other threads:[~2021-01-06 11:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-05 18:31 [PATCH] x86/dpci: EOI interrupt regardless of it's masking status Roger Pau Monne
2021-01-06 11:22 ` Jan Beulich [this message]
2021-01-06 21:04 ` Wei Liu
2021-01-07 9:41 ` Roger Pau Monné
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