From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?utf-8?B?UGF3ZcWC?= Jarosz Subject: [PATCH v2 2/2] ARM: dts: rockchip: initialize rk3066 PLL clock rate Date: Fri, 14 Oct 2016 14:16:54 +0200 Message-ID: <6992e44d06e1615048717deb3dd76e52d26da869.1476447057.git.paweljarosz3691@gmail.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: paweljarosz3691@gmail.com Cc: mark.rutland@arm.com, heiko@sntech.de, mturquette@baylibre.com, sboyd@codeaurora.org, linux@armlinux.org.uk, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org SW5pdGlhbGl6ZSBQTEwsIGNwdSBidXMgYW5kIHBlcmlwaGVyaWFsIGJ1cyByYXRlIHdoaWxlIGtl cm5lbCBpbml0LgpObyBvdGhlciBtb2R1bGUgZG9lcyB0aGFuLgoKVGhpcyBnaXZlcyB1cyBwZXJm b3JtYW5jZSBib29zdCBvYnNlcnZhYmxlIGZvciBleGFtcGxlIGluIG1tYyB0cmFuc2ZlcnMuCgpT aWduZWQtb2ZmLWJ5OiBQYXdlxYIgSmFyb3N6IDxwYXdlbGphcm9zejM2OTFAZ21haWwuY29tPgot LS0KCkNoYW5nZXMgaW4gdjI6Ci0gYWRkZWQgcGVyaXBoZXJpYWwgYW5kIGNwdSBidXMKLSByZW1v dmVkIFBMTF9EUExMLCBQTExfQVBMTAoKIGFyY2gvYXJtL2Jvb3QvZHRzL3JrMzA2NmEuZHRzaSB8 IDkgKysrKysrKysrCiAxIGZpbGUgY2hhbmdlZCwgOSBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0 IGEvYXJjaC9hcm0vYm9vdC9kdHMvcmszMDY2YS5kdHNpIGIvYXJjaC9hcm0vYm9vdC9kdHMvcmsz MDY2YS5kdHNpCmluZGV4IDBkMGRhZTMuLjI5ZGQ0MzQgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL2Jv b3QvZHRzL3JrMzA2NmEuZHRzaQorKysgYi9hcmNoL2FybS9ib290L2R0cy9yazMwNjZhLmR0c2kK QEAgLTE1MSw2ICsxNTEsMTUgQEAKIAogCQkjY2xvY2stY2VsbHMgPSA8MT47CiAJCSNyZXNldC1j ZWxscyA9IDwxPjsKKwkJYXNzaWduZWQtY2xvY2tzID0gPCZjcnUgUExMX0NQTEw+LCA8JmNydSBQ TExfR1BMTD4sCisJCQkJICA8JmNydSBBQ0xLX0NQVT4sIDwmY3J1IEhDTEtfQ1BVPiwKKwkJCQkg IDwmY3J1IFBDTEtfQ1BVPiwgPCZjcnUgQUNMS19QRVJJPiwKKwkJCQkgIDwmY3J1IEhDTEtfUEVS ST4sIDwmY3J1IFBDTEtfUEVSST47CisKKwkJYXNzaWduZWQtY2xvY2stcmF0ZXMgPSA8NDAwMDAw MDAwPiwgPDU5NDAwMDAwMD4sCisJCQkJICAgICAgIDwzMDAwMDAwMDA+LCA8MTUwMDAwMDAwPiwK KwkJCQkgICAgICAgPDc1MDAwMDAwPiwgPDMwMDAwMDAwMD4sCisJCQkJICAgICAgIDwxNTAwMDAw MDA+LCA8NzUwMDAwMDA+OwogCX07CiAKIAl0aW1lckAyMDAwZTAwMCB7Ci0tIAoyLjcuNAoKCl9f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1r ZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpo dHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJu ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: paweljarosz3691@gmail.com (=?utf-8?B?UGF3ZcWC?= Jarosz) Date: Fri, 14 Oct 2016 14:16:54 +0200 Subject: [PATCH v2 2/2] ARM: dts: rockchip: initialize rk3066 PLL clock rate In-Reply-To: References: Message-ID: <6992e44d06e1615048717deb3dd76e52d26da869.1476447057.git.paweljarosz3691@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Initialize PLL, cpu bus and peripherial bus rate while kernel init. No other module does than. This gives us performance boost observable for example in mmc transfers. Signed-off-by: Pawe? Jarosz --- Changes in v2: - added peripherial and cpu bus - removed PLL_DPLL, PLL_APLL arch/arm/boot/dts/rk3066a.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 0d0dae3..29dd434 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -151,6 +151,15 @@ #clock-cells = <1>; #reset-cells = <1>; + assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>, + <&cru ACLK_CPU>, <&cru HCLK_CPU>, + <&cru PCLK_CPU>, <&cru ACLK_PERI>, + <&cru HCLK_PERI>, <&cru PCLK_PERI>; + + assigned-clock-rates = <400000000>, <594000000>, + <300000000>, <150000000>, + <75000000>, <300000000>, + <150000000>, <75000000>; }; timer at 2000e000 { -- 2.7.4