From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 18 Jan 2019 07:33:30 -0000 Received: from mx1.redhat.com ([209.132.183.28]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1gkOee-0000vx-T7 for speck@linutronix.de; Fri, 18 Jan 2019 08:33:29 +0100 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5016C19D22B for ; Fri, 18 Jan 2019 07:33:22 +0000 (UTC) Received: from tonnant.bos.jonmasters.org (ovpn-121-128.rdu2.redhat.com [10.10.121.128]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F28115C21F for ; Fri, 18 Jan 2019 07:33:21 +0000 (UTC) References: <021c5ba2a9fdae326058dd16785b30c31546cd0f.1547256470.git.ak@linux.intel.com> <1ce79648-6263-d726-bb69-da54131535a2@intel.com> From: Jon Masters Message-ID: <69f56234-a875-917d-a8c1-b82b81144af9@redhat.com> Date: Fri, 18 Jan 2019 02:33:21 -0500 MIME-Version: 1.0 In-Reply-To: <1ce79648-6263-d726-bb69-da54131535a2@intel.com> Subject: [MODERATED] Encrypted Message Content-Type: multipart/mixed; boundary="2QVSYiHw5HUdTY3sX4m5Yd8Y5sMxlVX3K"; protected-headers="v1" To: speck@linutronix.de List-ID: This is an OpenPGP/MIME encrypted message (RFC 4880 and 3156) --2QVSYiHw5HUdTY3sX4m5Yd8Y5sMxlVX3K Content-Type: text/rfc822-headers; protected-headers="v1" Content-Disposition: inline From: Jon Masters To: speck for Dave Hansen Subject: Re: [PATCH v4 05/28] MDSv4 10 --2QVSYiHw5HUdTY3sX4m5Yd8Y5sMxlVX3K Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 1/14/19 2:20 PM, speck for Dave Hansen wrote: > On 1/11/19 5:29 PM, speck for Andi Kleen wrote: >> When entering idle the internal state of the current CPU might >> become visible to the thread sibling because the CPU "frees" some >> internal resources. >=20 > Is there some documentation somewhere about what "idle" means here? It= > looks like MWAIT and HLT certainly count, but is there anything else? We know power state transitions in addition can cause the peer to dynamically sleep or wake up. MWAIT was the main example I got out of Intel for how you'd explicitly cause a thread to be deallocated. When Andi is talking about "frees" above he means (for example) the dynamic allocation/deallocation of store buffer entries as threads come and go - e.g. in Skylake there are 56 entries in a distributed store buffer that splits into 2x28. I am not aware of fill buffer behavior changing as threads come and go, and this isn't documented AFAICS. I've been wondering whether we want a bit more detail in the docs. I spent a /lot/ of time last week going through all of Intel's patents in this area, which really help understand it. If folks feel we could do with a bit more meaty summary, I can try to suggest something. Jon. --=20 Computer Architect | Sent with my Fedora powered laptop --2QVSYiHw5HUdTY3sX4m5Yd8Y5sMxlVX3K--