From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Lu, Wenzhuo" <wenzhuo.lu@intel.com>
Subject: Re: [PATCH v2 2/3] net/i40e: parse QinQ pattern
Date: Tue, 28 Mar 2017 08:45:37 +0000
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 <1490287113-8895-3-git-send-email-bernard.iremonger@intel.com>
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Cc: "Zhang, Helin" <helin.zhang@intel.com>, "Iremonger, Bernard"
 <bernard.iremonger@intel.com>
To: "Iremonger, Bernard" <bernard.iremonger@intel.com>, "dev@dpdk.org"
 <dev@dpdk.org>, "Xing, Beilei" <beilei.xing@intel.com>, "Wu, Jingjing"
 <jingjing.wu@intel.com>
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Hi Bernard,

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Bernard Iremonger
> Sent: Friday, March 24, 2017 12:39 AM
> To: dev@dpdk.org; Xing, Beilei; Wu, Jingjing
> Cc: Zhang, Helin; Iremonger, Bernard
> Subject: [dpdk-dev] [PATCH v2 2/3] net/i40e: parse QinQ pattern
>=20
> add QinQ pattern.
> add i40e_flow_parse_qinq_pattern function.
> add i40e_flow_parse_qinq_filter function.
>=20
> Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
> ---
>  drivers/net/i40e/i40e_flow.c | 194
> ++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 192 insertions(+), 2 deletions(-)
>=20
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c =
index
> 8d7765a..e53ab22 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c

> +/* Pattern matched QINQ */
> +static enum rte_flow_item_type pattern_qinq_1[] =3D {
> +	RTE_FLOW_ITEM_TYPE_ETH,
> +	RTE_FLOW_ITEM_TYPE_VLAN,
> +	RTE_FLOW_ITEM_TYPE_VLAN,
> +	RTE_FLOW_ITEM_TYPE_END,
> +};

> +
> +	/* Check specification and mask to get the filter type */
> +	if (vlan_spec && vlan_mask &&
> +	    (vlan_mask->tci =3D=3D rte_cpu_to_be_16(I40E_TCI_MASK))) {
> +		/* If there's inner vlan */
> +		if (vlan_flag)
I think vlan_flag here is always 0, according to defined 'pattern_qinq_1'. =
Single vlan is not supported.

> +			filter->inner_vlan =3D rte_be_to_cpu_16(o_vlan_spec-
> >tci)
> +				& I40E_TCI_MASK;
> +		else {
> +			/* There is an inner and outer vlan */
> +			filter->outer_vlan =3D rte_be_to_cpu_16(o_vlan_spec-
> >tci)
> +				& I40E_TCI_MASK;
> +			filter->inner_vlan =3D rte_be_to_cpu_16(i_vlan_spec-
> >tci)
> +				& I40E_TCI_MASK;
> +		}