From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Lu, Wenzhuo" Subject: Re: [PATCH v3 2/5] net/i40e: parse QinQ pattern Date: Wed, 29 Mar 2017 01:25:02 +0000 Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC09093B583FA8@shsmsx102.ccr.corp.intel.com> References: <1490287113-8895-1-git-send-email-bernard.iremonger@intel.com> <1490718059-380-3-git-send-email-bernard.iremonger@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: "Zhang, Helin" To: "Iremonger, Bernard" , "dev@dpdk.org" , "Xing, Beilei" , "Wu, Jingjing" Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 7E46D1094 for ; Wed, 29 Mar 2017 03:25:09 +0200 (CEST) In-Reply-To: <1490718059-380-3-git-send-email-bernard.iremonger@intel.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Bernard, > -----Original Message----- > From: Iremonger, Bernard > Sent: Wednesday, March 29, 2017 12:21 AM > To: dev@dpdk.org; Xing, Beilei; Wu, Jingjing > Cc: Zhang, Helin; Lu, Wenzhuo; Iremonger, Bernard > Subject: [PATCH v3 2/5] net/i40e: parse QinQ pattern >=20 > add QinQ pattern. > add i40e_flow_parse_qinq_pattern function. > add i40e_flow_parse_qinq_filter function. >=20 > Signed-off-by: Bernard Iremonger > --- > drivers/net/i40e/i40e_flow.c | 187 > ++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 185 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c = index > be243e172..39b09ead5 100644 > --- a/drivers/net/i40e/i40e_flow.c > +++ b/drivers/net/i40e/i40e_flow.c > + /* Check specification and mask to get the filter type */ > + if (vlan_spec && vlan_mask && The previous code already checked the vlan_spec and vlan_mask should not be= NULL. Seems not necessary to check it again. > + (vlan_mask->tci =3D=3D rte_cpu_to_be_16(I40E_TCI_MASK))) { The vlan_mask here should be inner vlan mask. The outer vlan mask is lost.= Should we store the outer vlan mask and check it? > + /* There is an inner and outer vlan */ > + filter->outer_vlan =3D rte_be_to_cpu_16(o_vlan_spec->tci) > + & I40E_TCI_MASK; > + filter->inner_vlan =3D rte_be_to_cpu_16(i_vlan_spec->tci) > + & I40E_TCI_MASK; > + if (i_eth_spec && i_eth_mask) > + filter->filter_type =3D > + I40E_TUNNEL_FILTER_CUSTOM_QINQ; > + else { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + NULL, > + "Invalid filter type"); > + return -rte_errno; > + } > + } else if ((!vlan_spec && !vlan_mask) || > + (vlan_spec && vlan_mask && vlan_mask->tci =3D=3D 0x0)) { > + if (i_eth_spec && i_eth_mask) { The similar concern as above. > + filter->filter_type =3D > I40E_TUNNEL_FILTER_CUSTOM_QINQ; > + } else { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, NULL, > + "Invalid filter type"); > + return -rte_errno; > + } > + } else { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, NULL, > + "Not supported by tunnel filter."); > + return -rte_errno; > + } > + > + filter->tunnel_type =3D I40E_TUNNEL_TYPE_QINQ; > + > + return 0; > +}