diff for duplicates of <6A3DF150A5B70D4F9B66A25E3F7C888D070D6DAB@039-SN2MPN1-013.039d.mgd.msft.net>
diff --git a/a/1.txt b/N1/1.txt
index 2765db5..0f2f033 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,115 +1,71 @@
-
-
-> -----Original Message-----
-> From: kvm-ppc-owner@vger.kernel.org [mailto:kvm-ppc-owner@vger.kernel.org] On
-> Behalf Of "“tiejun.chen”"
-> Sent: Thursday, July 18, 2013 1:01 PM
-> To: Bhushan Bharat-R65777
-> Cc: kvm-ppc@vger.kernel.org; kvm@vger.kernel.org; agraf@suse.de; Wood Scott-
-> B07421
-> Subject: Re: [PATCH 2/2] kvm: powerpc: set cache coherency only for kernel
-> managed pages
->
-> On 07/18/2013 03:12 PM, Bhushan Bharat-R65777 wrote:
-> >
-> >
-> >> -----Original Message-----
-> >> From: "“tiejun.chen”" [mailto:tiejun.chen@windriver.com]
-> >> Sent: Thursday, July 18, 2013 11:56 AM
-> >> To: Bhushan Bharat-R65777
-> >> Cc: kvm-ppc@vger.kernel.org; kvm@vger.kernel.org; agraf@suse.de; Wood
-> >> Scott- B07421; Bhushan Bharat-R65777
-> >> Subject: Re: [PATCH 2/2] kvm: powerpc: set cache coherency only for
-> >> kernel managed pages
-> >>
-> >> On 07/18/2013 02:04 PM, Bharat Bhushan wrote:
-> >>> If there is a struct page for the requested mapping then it's normal
-> >>> DDR and the mapping sets "M" bit (coherent, cacheable) else this is
-> >>> treated as I/O and we set "I + G" (cache inhibited, guarded)
-> >>>
-> >>> This helps setting proper TLB mapping for direct assigned device
-> >>>
-> >>> Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
-> >>> ---
-> >>> arch/powerpc/kvm/e500_mmu_host.c | 17 ++++++++++++-----
-> >>> 1 files changed, 12 insertions(+), 5 deletions(-)
-> >>>
-> >>> diff --git a/arch/powerpc/kvm/e500_mmu_host.c
-> >>> b/arch/powerpc/kvm/e500_mmu_host.c
-> >>> index 1c6a9d7..089c227 100644
-> >>> --- a/arch/powerpc/kvm/e500_mmu_host.c
-> >>> +++ b/arch/powerpc/kvm/e500_mmu_host.c
-> >>> @@ -64,13 +64,20 @@ static inline u32 e500_shadow_mas3_attrib(u32
-> >>> mas3, int
-> >> usermode)
-> >>> return mas3;
-> >>> }
-> >>>
-> >>> -static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
-> >>> +static inline u32 e500_shadow_mas2_attrib(u32 mas2, pfn_t pfn)
-> >>> {
-> >>> + u32 mas2_attr;
-> >>> +
-> >>> + mas2_attr = mas2 & MAS2_ATTRIB_MASK;
-> >>> +
-> >>> + if (!pfn_valid(pfn)) {
-> >>
-> >> Why not directly use kvm_is_mmio_pfn()?
-> >
-> > What I understand from this function (someone can correct me) is that it
-> returns "false" when the page is managed by kernel and is not marked as RESERVED
-> (for some reason). For us it does not matter whether the page is reserved or
-> not, if it is kernel visible page then it is DDR.
-> >
->
-> I think you are setting I|G by addressing all mmio pages, right? If so,
->
-> KVM: direct mmio pfn check
->
-> Userspace may specify memory slots that are backed by mmio pages rather
-> than
-> normal RAM. In some cases it is not enough to identify these mmio pages
-> by pfn_valid(). This patch adds checking the PageReserved as well.
-
-Do you know what are those "some cases" and how checking PageReserved helps in those cases?
-
--Bharat
-
->
-> Tiejun
->
-> > -Bharat
-> >
-> >>
-> >> Tiejun
-> >>
-> >>> + mas2_attr |= MAS2_I | MAS2_G;
-> >>> + } else {
-> >>> #ifdef CONFIG_SMP
-> >>> - return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
-> >>> -#else
-> >>> - return mas2 & MAS2_ATTRIB_MASK;
-> >>> + mas2_attr |= MAS2_M;
-> >>> #endif
-> >>> + }
-> >>> + return mas2_attr;
-> >>> }
-> >>>
-> >>> /*
-> >>> @@ -313,7 +320,7 @@ static void kvmppc_e500_setup_stlbe(
-> >>> /* Force IPROT=0 for all guest mappings. */
-> >>> stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
-> >>> stlbe->mas2 = (gvaddr & MAS2_EPN) |
-> >>> - e500_shadow_mas2_attrib(gtlbe->mas2, pr);
-> >>> + e500_shadow_mas2_attrib(gtlbe->mas2, pfn);
-> >>> stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
-> >>> e500_shadow_mas3_attrib(gtlbe->mas7_3, pr);
-> >>>
-> >>>
-> >>
-> >
->
-> --
-> To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body
-> of a message to majordomo@vger.kernel.org More majordomo info at
-> http://vger.kernel.org/majordomo-info.html
\ No newline at end of file
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diff --git a/a/content_digest b/N1/content_digest
index 3aa5e46..87110f4 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -38,121 +38,77 @@
"b\0"
]
[
- "\n",
- "\n",
- "> -----Original Message-----\n",
- "> From: kvm-ppc-owner\@vger.kernel.org [mailto:kvm-ppc-owner\@vger.kernel.org] On\n",
- "> Behalf Of \"\342\200\234tiejun.chen\342\200\235\"\n",
- "> Sent: Thursday, July 18, 2013 1:01 PM\n",
- "> To: Bhushan Bharat-R65777\n",
- "> Cc: kvm-ppc\@vger.kernel.org; kvm\@vger.kernel.org; agraf\@suse.de; Wood Scott-\n",
- "> B07421\n",
- "> Subject: Re: [PATCH 2/2] kvm: powerpc: set cache coherency only for kernel\n",
- "> managed pages\n",
- "> \n",
- "> On 07/18/2013 03:12 PM, Bhushan Bharat-R65777 wrote:\n",
- "> >\n",
- "> >\n",
- "> >> -----Original Message-----\n",
- "> >> From: \"\342\200\234tiejun.chen\342\200\235\" [mailto:tiejun.chen\@windriver.com]\n",
- "> >> Sent: Thursday, July 18, 2013 11:56 AM\n",
- "> >> To: Bhushan Bharat-R65777\n",
- "> >> Cc: kvm-ppc\@vger.kernel.org; kvm\@vger.kernel.org; agraf\@suse.de; Wood\n",
- "> >> Scott- B07421; Bhushan Bharat-R65777\n",
- "> >> Subject: Re: [PATCH 2/2] kvm: powerpc: set cache coherency only for\n",
- "> >> kernel managed pages\n",
- "> >>\n",
- "> >> On 07/18/2013 02:04 PM, Bharat Bhushan wrote:\n",
- "> >>> If there is a struct page for the requested mapping then it's normal\n",
- "> >>> DDR and the mapping sets \"M\" bit (coherent, cacheable) else this is\n",
- "> >>> treated as I/O and we set \"I + G\" (cache inhibited, guarded)\n",
- "> >>>\n",
- "> >>> This helps setting proper TLB mapping for direct assigned device\n",
- "> >>>\n",
- "> >>> Signed-off-by: Bharat Bhushan <bharat.bhushan\@freescale.com>\n",
- "> >>> ---\n",
- "> >>> arch/powerpc/kvm/e500_mmu_host.c | 17 ++++++++++++-----\n",
- "> >>> 1 files changed, 12 insertions(+), 5 deletions(-)\n",
- "> >>>\n",
- "> >>> diff --git a/arch/powerpc/kvm/e500_mmu_host.c\n",
- "> >>> b/arch/powerpc/kvm/e500_mmu_host.c\n",
- "> >>> index 1c6a9d7..089c227 100644\n",
- "> >>> --- a/arch/powerpc/kvm/e500_mmu_host.c\n",
- "> >>> +++ b/arch/powerpc/kvm/e500_mmu_host.c\n",
- "> >>> \@\@ -64,13 +64,20 \@\@ static inline u32 e500_shadow_mas3_attrib(u32\n",
- "> >>> mas3, int\n",
- "> >> usermode)\n",
- "> >>> \treturn mas3;\n",
- "> >>> }\n",
- "> >>>\n",
- "> >>> -static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)\n",
- "> >>> +static inline u32 e500_shadow_mas2_attrib(u32 mas2, pfn_t pfn)\n",
- "> >>> {\n",
- "> >>> +\tu32 mas2_attr;\n",
- "> >>> +\n",
- "> >>> +\tmas2_attr = mas2 & MAS2_ATTRIB_MASK;\n",
- "> >>> +\n",
- "> >>> +\tif (!pfn_valid(pfn)) {\n",
- "> >>\n",
- "> >> Why not directly use kvm_is_mmio_pfn()?\n",
- "> >\n",
- "> > What I understand from this function (someone can correct me) is that it\n",
- "> returns \"false\" when the page is managed by kernel and is not marked as RESERVED\n",
- "> (for some reason). For us it does not matter whether the page is reserved or\n",
- "> not, if it is kernel visible page then it is DDR.\n",
- "> >\n",
- "> \n",
- "> I think you are setting I|G by addressing all mmio pages, right? If so,\n",
- "> \n",
- "> KVM: direct mmio pfn check\n",
- "> \n",
- "> Userspace may specify memory slots that are backed by mmio pages rather\n",
- "> than\n",
- "> normal RAM. In some cases it is not enough to identify these mmio pages\n",
- "> by pfn_valid(). This patch adds checking the PageReserved as well.\n",
- "\n",
- "Do you know what are those \"some cases\" and how checking PageReserved helps in those cases?\n",
- "\n",
- "-Bharat\n",
- "\n",
- "> \n",
- "> Tiejun\n",
- "> \n",
- "> > -Bharat\n",
- "> >\n",
- "> >>\n",
- "> >> Tiejun\n",
- "> >>\n",
- "> >>> +\t\tmas2_attr |= MAS2_I | MAS2_G;\n",
- "> >>> +\t} else {\n",
- "> >>> #ifdef CONFIG_SMP\n",
- "> >>> -\treturn (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;\n",
- "> >>> -#else\n",
- "> >>> -\treturn mas2 & MAS2_ATTRIB_MASK;\n",
- "> >>> +\t\tmas2_attr |= MAS2_M;\n",
- "> >>> #endif\n",
- "> >>> +\t}\n",
- "> >>> +\treturn mas2_attr;\n",
- "> >>> }\n",
- "> >>>\n",
- "> >>> /*\n",
- "> >>> \@\@ -313,7 +320,7 \@\@ static void kvmppc_e500_setup_stlbe(\n",
- "> >>> \t/* Force IPROT=0 for all guest mappings. */\n",
- "> >>> \tstlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;\n",
- "> >>> \tstlbe->mas2 = (gvaddr & MAS2_EPN) |\n",
- "> >>> -\t\t e500_shadow_mas2_attrib(gtlbe->mas2, pr);\n",
- "> >>> +\t\t e500_shadow_mas2_attrib(gtlbe->mas2, pfn);\n",
- "> >>> \tstlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |\n",
- "> >>> \t\t\te500_shadow_mas3_attrib(gtlbe->mas7_3, pr);\n",
- "> >>>\n",
- "> >>>\n",
- "> >>\n",
- "> >\n",
- "> \n",
- "> --\n",
- "> To unsubscribe from this list: send the line \"unsubscribe kvm-ppc\" in the body\n",
- "> of a message to majordomo\@vger.kernel.org More majordomo info at\n",
- "> http://vger.kernel.org/majordomo-info.html"
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This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.