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[83.52.55.21]) by smtp.gmail.com with ESMTPSA id u6sm11350313wrp.0.2021.09.13.23.36.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 13 Sep 2021 23:36:25 -0700 (PDT) Subject: Re: [PATCH v4 04/33] i386: Add 'sgx-epc' device to expose EPC sections to guest To: Yang Zhong , qemu-devel@nongnu.org References: <20210719112136.57018-1-yang.zhong@intel.com> <20210719112136.57018-5-yang.zhong@intel.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <6a2fe37a-0016-018d-ff41-77f1e57b8aeb@redhat.com> Date: Tue, 14 Sep 2021 08:36:24 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210719112136.57018-5-yang.zhong@intel.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -51 X-Spam_score: -5.2 X-Spam_bar: ----- X-Spam_report: (-5.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.398, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.969, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanjc@google.com, kai.huang@intel.com, eblake@redhat.com, jarkko@kernel.org, pbonzini@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 7/19/21 1:21 PM, Yang Zhong wrote: > From: Sean Christopherson > > SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be > realized prior to realizing the vCPUs themselves, which occurs long > before generic devices are parsed and realized. Because of this, > do not allow 'sgx-epc' devices to be instantiated after vCPUS have > been created. > > The 'sgx-epc' device is essentially a placholder at this time, it will > be fully implemented in a future patch along with a dedicated command > to create 'sgx-epc' devices. > > Signed-off-by: Sean Christopherson > Signed-off-by: Yang Zhong > --- > hw/i386/meson.build | 1 + > hw/i386/sgx-epc.c | 161 ++++++++++++++++++++++++++++++++++++++ > include/hw/i386/sgx-epc.h | 44 +++++++++++ > 3 files changed, 206 insertions(+) > create mode 100644 hw/i386/sgx-epc.c > create mode 100644 include/hw/i386/sgx-epc.h > > diff --git a/hw/i386/meson.build b/hw/i386/meson.build > index 80dad29f2b..27476b36bb 100644 > --- a/hw/i386/meson.build > +++ b/hw/i386/meson.build > @@ -5,6 +5,7 @@ i386_ss.add(files( > 'e820_memory_layout.c', > 'multiboot.c', > 'x86.c', > + 'sgx-epc.c', > )) > > i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: files('x86-iommu.c'), > diff --git a/hw/i386/sgx-epc.c b/hw/i386/sgx-epc.c > new file mode 100644 > index 0000000000..aa487dea79 > --- /dev/null > +++ b/hw/i386/sgx-epc.c > @@ -0,0 +1,161 @@ > +/* > + * SGX EPC device > + * > + * Copyright (C) 2019 Intel Corporation > + * > + * Authors: > + * Sean Christopherson > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or later. > + * See the COPYING file in the top-level directory. > + */ > +#include "qemu/osdep.h" > +#include "hw/i386/pc.h" > +#include "hw/i386/sgx-epc.h" > +#include "hw/mem/memory-device.h" > +#include "hw/qdev-properties.h" > +#include "monitor/qdev.h" Is that include used? > +#include "qapi/error.h" > +#include "qapi/visitor.h" > +#include "qemu/config-file.h" Ditto. > +#include "qemu/error-report.h" Ditto. > +#include "qemu/option.h" Ditto. > +#include "qemu/units.h" Ditto. > +#include "target/i386/cpu.h" > +#include "exec/address-spaces.h"